[all-commits] [llvm/llvm-project] cd8d21: [X86][Costmodel] `getReplicationShuffleCost()`: pr...

[Roman Lebedev via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: cd8d219536912b5ea04961af3a38955d8333bb3e
      https://github.com/llvm/llvm-project/commit/cd8d219536912b5ea04961af3a38955d8333bb3e
  Author: Roman Lebedev <lebedev.ri at gmail.com>
  Date:   2021-11-24 (Wed, 24 Nov 2021)

  Changed paths:
    M llvm/lib/Target/X86/X86TargetTransformInfo.cpp
    M llvm/test/Analysis/CostModel/X86/shuffle-replication-i1.ll

  Log Message:
  -----------
  [X86][Costmodel] `getReplicationShuffleCost()`: promote 1 bit-wide elements to 32 bit when have AVX512DQ

I believe, this effectively completes `X86TTIImpl::getReplicationShuffleCost()`
for AVX512, other than the question of handling plain AVX512F,
where we end up with some really ugly "shuffles",
but then is there any CPU's that support AVX512, but not AVX512DQ/AVX512BW?

Reviewed By: RKSimon

Differential Revision: https://reviews.llvm.org/D114315