[all-commits] [llvm/llvm-project] 32c432: [mlir][linalg] Always generate an extract/insert s...

[Tobias Gysi via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 32c43241e716280d3443d684416826b1e7e5781b
      https://github.com/llvm/llvm-project/commit/32c43241e716280d3443d684416826b1e7e5781b
  Author: Tobias Gysi <gysit at google.com>
  Date:   2021-11-22 (Mon, 22 Nov 2021)

  Changed paths:
    M mlir/lib/Dialect/Linalg/Utils/Utils.cpp
    M mlir/test/Dialect/Linalg/fusion-tensor-pattern.mlir
    M mlir/test/Dialect/Linalg/tile-and-fuse-on-tensors.mlir

  Log Message:
  -----------
  [mlir][linalg] Always generate an extract/insert slice pair when tiling output tensors.

Adapt tiling to always generate an extract/insert slice pair for output tensors even if the tensor is not tiled. Having an explicit extract/insert slice pair simplifies followup transformations such as padding and bufferization. In particular, it makes read and written iteration argument slices explicit.

Depends On D114067

Reviewed By: nicolasvasilache

Differential Revision: https://reviews.llvm.org/D114085