[all-commits] [llvm/llvm-project] ff7f2c: [AMDGPU] Add an implicit use of M0 to all V_MOV_B3...

[Jay Foad via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: ff7f2cfa959bbc2effefb6f11f225b525e9029c8
      https://github.com/llvm/llvm-project/commit/ff7f2cfa959bbc2effefb6f11f225b525e9029c8
  Author: Jay Foad <jay.foad at amd.com>
  Date:   2021-11-19 (Fri, 19 Nov 2021)

  Changed paths:
    M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
    M llvm/lib/Target/AMDGPU/VOP1Instructions.td
    M llvm/test/CodeGen/AMDGPU/set-gpr-idx-peephole.mir

  Log Message:
  -----------
  [AMDGPU] Add an implicit use of M0 to all V_MOV_B32_indirect_read/write

NFCI. Previously the implicit use was added to V_MOV_B32_indirect_read
when building the instruction. V_MOV_B32_indirect_write didn't have an
implicit use of M0 at all, but apparently it did not cause any problems.

Differential Revision: https://reviews.llvm.org/D114239