[all-commits] [llvm/llvm-project] fb1a06: [MLIR][GPU] Add target arguments to SerializeToHsaco

[Krzysztof Drewniak via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: fb1a06aa13815c20fe2fdffc520d530e98dfae7a
      https://github.com/llvm/llvm-project/commit/fb1a06aa13815c20fe2fdffc520d530e98dfae7a
  Author: Krzysztof Drewniak <Krzysztof.Drewniak at amd.com>
  Date:   2021-11-18 (Thu, 18 Nov 2021)

  Changed paths:
    M mlir/lib/Dialect/GPU/CMakeLists.txt
    M mlir/lib/Dialect/GPU/Transforms/SerializeToHsaco.cpp
    M mlir/lib/ExecutionEngine/CMakeLists.txt
    M mlir/test/Integration/GPU/ROCM/gpu-to-hsaco.mlir
    M mlir/test/Integration/GPU/ROCM/lit.local.cfg
    M mlir/test/Integration/GPU/ROCM/two-modules.mlir
    M mlir/test/Integration/GPU/ROCM/vecadd.mlir
    M mlir/test/Integration/GPU/ROCM/vector-transferops.mlir
    M mlir/test/lit.site.cfg.py.in

  Log Message:
  -----------
  [MLIR][GPU] Add target arguments to SerializeToHsaco

Compiling code for AMD GPUs requires knowledge of which chipset is
being targeted, especially if the code uses chipset-specific
intrinsics (which is the case in a downstream convolution generator).
This commit adds `target`, `chipset` and `features` arguments to the
SerializeToHsaco constructor to enable passing in this required
information.

It also amends the ROCm integration tests to pass in the target
chipset, which is set to the chipset of the first GPU on the system
executing the tests.

Reviewed By: mehdi_amini

Differential Revision: https://reviews.llvm.org/D114107