[all-commits] [llvm/llvm-project] f59307: [RISCV] Teach needVSETVLIPHI to handle mask regist...

[Craig Topper via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: f59307bfdc01c584bfa7cd31a55226831bf5590f
      https://github.com/llvm/llvm-project/commit/f59307bfdc01c584bfa7cd31a55226831bf5590f
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2021-11-15 (Mon, 15 Nov 2021)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp
    M llvm/test/CodeGen/RISCV/rvv/vsetvli-insert.ll

  Log Message:
  -----------
  [RISCV] Teach needVSETVLIPHI to handle mask register instructions.

This handles the case where the mask register instruction input
comes from a Phi of vsetvlis. If the VLMAX is the same as the VLMAX
required by the mask register instruction, we can avoid a vsetvli.

Reviewed By: frasercrmck

Differential Revision: https://reviews.llvm.org/D113204