[all-commits] [llvm/llvm-project] 5be64d: Revert "[x86] fold vector (X > -1) & Y to shift+andn"

[Hans via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 5be64d416481c59dba5faae5e8b8a6fecb578082
      https://github.com/llvm/llvm-project/commit/5be64d416481c59dba5faae5e8b8a6fecb578082
  Author: Hans Wennborg <hans at chromium.org>
  Date:   2021-11-15 (Mon, 15 Nov 2021)

  Changed paths:
    M llvm/lib/Target/X86/X86ISelLowering.cpp
    M llvm/test/CodeGen/X86/vector-pcmp.ll
    M llvm/test/CodeGen/X86/vselect-zero.ll

  Log Message:
  -----------
  Revert "[x86] fold vector (X > -1) & Y to shift+andn"

This casued assertion failures:

  llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp:9446:
  void llvm::SelectionDAG::ReplaceAllUsesWith(llvm::SDNode *, llvm::SDNode *):
  Assertion `(!From->hasAnyUseOfValue(i) || From->getValueType(i) == To->getValueType(i))
  && "Cannot use this version of ReplaceAllUsesWith!"' failed.

See comment on the code review.

(Had to update some expectations in test/CodeGen/X86/vselect-zero.ll
 manually due to other changes having landed after the reverted one.)

> and (pcmpgt X, -1), Y --> pandn (vsrai X, BitWidth-1), Y
>
> This avoids the -1 constant vector in favor of an arithmetic shift
> instruction if it exists (the ISA is still not complete after all
> these years...).
>
> We catch this pattern late in combining by matching PCMPGT, so it
> should not interfere with more general folds.
>
> Differential Revision: https://reviews.llvm.org/D113603

This reverts commit bf5748a1af0d2f6f9396d9dc6ac89d15de41eee7.