[all-commits] [llvm/llvm-project] 18fe0a: [PowerPC] PPC backend optimization to lower int_pp...

[Victor Huang via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 18fe0a0d9eb1f38e57cbf8d3fde2241e682a8eb6
      https://github.com/llvm/llvm-project/commit/18fe0a0d9eb1f38e57cbf8d3fde2241e682a8eb6
  Author: Victor Huang <wei.huang at ibm.com>
  Date:   2021-11-11 (Thu, 11 Nov 2021)

  Changed paths:
    M llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
    M llvm/lib/Target/PowerPC/PPCInstr64Bit.td
    M llvm/lib/Target/PowerPC/PPCInstrInfo.td
    M llvm/test/CodeGen/PowerPC/builtins-ppc-xlcompat-trap-64bit-only.ll
    M llvm/test/CodeGen/PowerPC/builtins-ppc-xlcompat-trap.ll

  Log Message:
  -----------
  [PowerPC] PPC backend optimization to lower int_ppc_tdw/int_ppc_tw intrinsics to TDI/TWI machine instructions

This patch adds the backend optimization to match XL behavior for the two
builtins __tdw and __tw that when the second input argument is an immediate,
emitting tdi/twi instructions instead of td/tw.

Reviewed By: nemanjai, amyk, PowerPC

Differential revision: https://reviews.llvm.org/D112285