[all-commits] [llvm/llvm-project] c36b7e: [InstCombine] enhance vector bitwise select matching

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  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: c36b7e21bd8f04a44d6935c3469b1bcbbafeeb2d
      https://github.com/llvm/llvm-project/commit/c36b7e21bd8f04a44d6935c3469b1bcbbafeeb2d
  Author: Sanjay Patel <spatel at rotateright.com>
  Date:   2021-11-09 (Tue, 09 Nov 2021)

  Changed paths:
    M llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp
    M llvm/test/Transforms/InstCombine/logical-select.ll
    M llvm/test/Transforms/PhaseOrdering/X86/vector-math.ll

  Log Message:
  -----------
  [InstCombine] enhance vector bitwise select matching

(Cond & C) | (~bitcast(Cond) & D) --> bitcast (select Cond, (bc C), (bc D))

This is part of fixing:
https://llvm.org/PR34047

That report shows a case where a bitcast is sitting between the select condition
candidate and its 'not' value due to current cast canonicalization rules.

There's a bitcast type restriction that might be violated in existing matching,
but I still need to investigate if that is possible -
Alive2 shows we can only do this transform safely when the bitcast is from
narrow to wide vector elements (otherwise poison could leak into elements
that were safe in the original code):
https://alive2.llvm.org/ce/z/Hf66qh

Differential Revision: https://reviews.llvm.org/D113035