[all-commits] [llvm/llvm-project] e32cf6: [RISCV] Optimize (add (mul r, c0), c1)

[Ben Shi via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: e32cf690dfdcf41255022c075beac20c141e1419
      https://github.com/llvm/llvm-project/commit/e32cf690dfdcf41255022c075beac20c141e1419
  Author: Ben Shi <powerman1st at 163.com>
  Date:   2021-11-08 (Mon, 08 Nov 2021)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
    M llvm/test/CodeGen/RISCV/addimm-mulimm.ll

  Log Message:
  -----------
  [RISCV] Optimize (add (mul r, c0), c1)

Optimize (add (mul x, c0), c1) ->
         (add (mul (add x, c1/c0+1), c0), c1%c0-c0),
if c1/c0+1 and c1%c0-c0 are simm12, while c1 is not.

Optimize (add (mul x, c0), c1) ->
         (add (mul (add x, c1/c0-1), c0), c1%c0+c0),
if c1/c0-1 and c1%c0+c0 are simm12, while c1 is not.

Reviewed By: craig.topper, asb

Differential Revision: https://reviews.llvm.org/D111141