[all-commits] [llvm/llvm-project] 0649df: [RISCV] Rename some assembler mnemonic and intrins...
Zakk Chen via All-commits
all-commits at lists.llvm.org
Thu Nov 4 10:13:15 PDT 2021
Branch: refs/heads/main
Home: https://github.com/llvm/llvm-project
Commit: 0649dfebbab76424e9501a97a21a6253be1d6dcc
https://github.com/llvm/llvm-project/commit/0649dfebbab76424e9501a97a21a6253be1d6dcc
Author: Zakk Chen <zakk.chen at sifive.com>
Date: 2021-11-04 (Thu, 04 Nov 2021)
Changed paths:
M clang/include/clang/Basic/riscv_vector.td
A clang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vcpop.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vmand.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vmor.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vpopc.c
A clang/test/CodeGen/RISCV/rvv-intrinsics/vcpop.c
M clang/test/CodeGen/RISCV/rvv-intrinsics/vmand.c
M clang/test/CodeGen/RISCV/rvv-intrinsics/vmor.c
R clang/test/CodeGen/RISCV/rvv-intrinsics/vpopc.c
M llvm/include/llvm/IR/IntrinsicsRISCV.td
M llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
M llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.h
M llvm/lib/Target/RISCV/RISCVInstrInfoV.td
M llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
M llvm/lib/Target/RISCV/RISCVInstrInfoVSDPatterns.td
M llvm/lib/Target/RISCV/RISCVInstrInfoVVLPatterns.td
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-mask-logic.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-reduction-mask-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-select-int.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vreductions-mask.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vselect.ll
M llvm/test/CodeGen/RISCV/rvv/select-int.ll
A llvm/test/CodeGen/RISCV/rvv/vcpop-rv32.ll
A llvm/test/CodeGen/RISCV/rvv/vcpop-rv64.ll
A llvm/test/CodeGen/RISCV/rvv/vmandn-rv32.ll
A llvm/test/CodeGen/RISCV/rvv/vmandn-rv64.ll
R llvm/test/CodeGen/RISCV/rvv/vmandnot-rv32.ll
R llvm/test/CodeGen/RISCV/rvv/vmandnot-rv64.ll
M llvm/test/CodeGen/RISCV/rvv/vmarith-sdnode.ll
A llvm/test/CodeGen/RISCV/rvv/vmorn-rv32.ll
A llvm/test/CodeGen/RISCV/rvv/vmorn-rv64.ll
R llvm/test/CodeGen/RISCV/rvv/vmornot-rv32.ll
R llvm/test/CodeGen/RISCV/rvv/vmornot-rv64.ll
M llvm/test/CodeGen/RISCV/rvv/vmsge-rv32.ll
M llvm/test/CodeGen/RISCV/rvv/vmsge-rv64.ll
M llvm/test/CodeGen/RISCV/rvv/vmsgeu-rv32.ll
M llvm/test/CodeGen/RISCV/rvv/vmsgeu-rv64.ll
R llvm/test/CodeGen/RISCV/rvv/vpopc-rv32.ll
R llvm/test/CodeGen/RISCV/rvv/vpopc-rv64.ll
M llvm/test/CodeGen/RISCV/rvv/vreductions-mask-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vreductions-mask.ll
M llvm/test/CodeGen/RISCV/rvv/vselect-mask.ll
M llvm/test/CodeGen/RISCV/rvv/vsetvli-insert-crossbb.mir
M llvm/test/MC/RISCV/rvv/aliases.s
M llvm/test/MC/RISCV/rvv/compare.s
M llvm/test/MC/RISCV/rvv/mask.s
Log Message:
-----------
[RISCV] Rename some assembler mnemonic and intrinsic functions for RVV 1.0.
Rename vpopc/vmandnot/vmornot to vcpop/vmandn/vmorn assembler mnemonic.
Reviewed By: frasercrmck, jrtc27, craig.topper
Differential Revision: https://reviews.llvm.org/D111062
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