[all-commits] [llvm/llvm-project] beb539: [InstCombine] add tests for bitwise logic folds; NFC

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  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: beb5396d52d83dc9ccec8a427e12122cb33baf9d
      https://github.com/llvm/llvm-project/commit/beb5396d52d83dc9ccec8a427e12122cb33baf9d
  Author: Sanjay Patel <spatel at rotateright.com>
  Date:   2021-11-01 (Mon, 01 Nov 2021)

  Changed paths:
    M llvm/test/Transforms/InstCombine/and-or.ll

  Log Message:
  -----------
  [InstCombine] add tests for bitwise logic folds; NFC


  Commit: 42c94bc1abd1029c35846fd500a8b2bb008fef73
      https://github.com/llvm/llvm-project/commit/42c94bc1abd1029c35846fd500a8b2bb008fef73
  Author: Sanjay Patel <spatel at rotateright.com>
  Date:   2021-11-01 (Mon, 01 Nov 2021)

  Changed paths:
    M llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp
    M llvm/test/Transforms/InstCombine/and-or.ll

  Log Message:
  -----------
  [InstCombine] allow vector splat matching for bitwise logic fold

Similar to 54e969cffddb (and with cosmetic updates to hopefully
make that easier to read), this fold has been around since early
in LLVM history.

Intermediate folds have been added subsequently, so extra uses
are required to exercise this code.

The test example actually shows an unintended consequence with
extra uses - we end up with an extra instruction compared to what
we started with. But this at least makes scalar/vector consistent.

General proof:
https://alive2.llvm.org/ce/z/tmuBza


Compare: https://github.com/llvm/llvm-project/compare/bd932f7499ff...42c94bc1abd1