[all-commits] [llvm/llvm-project] f01faf: [SVE][CodeGen] Fix incorrect legalisation of zero-...

[kmclaughlin-arm via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: f01fafdcd469eab1e76f4bbb549d0b8729b5b195
      https://github.com/llvm/llvm-project/commit/f01fafdcd469eab1e76f4bbb549d0b8729b5b195
  Author: Kerry McLaughlin <kerry.mclaughlin at arm.com>
  Date:   2021-10-27 (Wed, 27 Oct 2021)

  Changed paths:
    M llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
    M llvm/test/CodeGen/AArch64/sve-masked-ldst-nonext.ll
    M llvm/test/CodeGen/AArch64/sve-masked-ldst-sext.ll
    M llvm/test/CodeGen/AArch64/sve-masked-ldst-zext.ll

  Log Message:
  -----------
  [SVE][CodeGen] Fix incorrect legalisation of zero-extended masked loads

PromoteIntRes_MLOAD always sets the extension type to `EXTLOAD`, which
results in a sign-extended load. If the type returned by getExtensionType()
for the load being promoted is something other than `NON_EXTLOAD`, we
should instead pass this to getMaskedLoad() as the extension type.

Reviewed By: CarolineConcatto

Differential Revision: https://reviews.llvm.org/D112320