[all-commits] [llvm/llvm-project] 9bd5cf: [AMDGPU] Implement llvm.amdgcn.mulhi.[i, u]24 intri...

[Abinav Puthan Purayil via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 9bd5cfeb1fa4d7a235c1c665c7800b7891ee38a8
      https://github.com/llvm/llvm-project/commit/9bd5cfeb1fa4d7a235c1c665c7800b7891ee38a8
  Author: Abinav Puthan Purayil <abinav.puthanpurayil at amd.com>
  Date:   2021-10-26 (Tue, 26 Oct 2021)

  Changed paths:
    M llvm/include/llvm/IR/IntrinsicsAMDGPU.td
    M llvm/lib/Target/AMDGPU/AMDGPUInstrInfo.td
    M llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
    M llvm/lib/Target/AMDGPU/VOP2Instructions.td
    A llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.mulhi.i24.mir
    A llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.mulhi.u24.mir
    A llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mulhi.i24.ll
    A llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mulhi.u24.ll

  Log Message:
  -----------
  [AMDGPU] Implement llvm.amdgcn.mulhi.[i,u]24 intrinsics.

These intrinsics maps to the 24-bit v_mul_hi instructions.

This change also fixes an incorrect assumption on the associativity of
24-bit mulhi in its SDNode record in tblgen.

Differential Revision: https://reviews.llvm.org/D112394