[all-commits] [llvm/llvm-project] 291588: [ScheduleDAGInstrs] Call adjustSchedDependency in ...

[Jay Foad via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 2915889d74b124d3105d1e7583fbfb1cf1bad10d
      https://github.com/llvm/llvm-project/commit/2915889d74b124d3105d1e7583fbfb1cf1bad10d
  Author: Jay Foad <jay.foad at amd.com>
  Date:   2021-10-22 (Fri, 22 Oct 2021)

  Changed paths:
    M llvm/lib/CodeGen/ScheduleDAGInstrs.cpp

  Log Message:
  -----------
  [ScheduleDAGInstrs] Call adjustSchedDependency in more cases

This removes a condition and the corresponding FIXME comment, because
the Hexagon assertion it refers to has apparently been fixed, probably
by D76134.

NFCI. This just gives targets the opportunity to adjust latencies that
were set to 0 by the generic code because they involve "implicit pseudo"
operands.

Differential Revision: https://reviews.llvm.org/D112306


  Commit: 3f34f75a68c34cc859d97943673ee44925702d10
      https://github.com/llvm/llvm-project/commit/3f34f75a68c34cc859d97943673ee44925702d10
  Author: Jay Foad <jay.foad at amd.com>
  Date:   2021-10-22 (Fri, 22 Oct 2021)

  Changed paths:
    M llvm/lib/Target/AMDGPU/AMDGPUSubtarget.cpp
    M llvm/lib/Target/AMDGPU/SIInstrInfo.h
    M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.div.fmas.ll
    M llvm/test/CodeGen/AMDGPU/ds-sub-offset.ll

  Log Message:
  -----------
  [AMDGPU] Fix latency for implicit vcc_lo operands on GFX10 wave32

As described in the comment, the way we change vcc to vcc_lo in these
operands confuses addPhysRegDataDeps into treating them as implicit
pseudo operands. Fix this by setting the correct latency from the
SchedModel after addPhysRegDataDeps wrongly set it to 0.

Differential Revision: https://reviews.llvm.org/D112317


Compare: https://github.com/llvm/llvm-project/compare/55f7cc1a9a2a...3f34f75a68c3