[all-commits] [llvm/llvm-project] ce7b83: [RISCV] Merge vector tests for rv32 and rv64 into ...

[Craig Topper via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: ce7b8343beb61764fafbedfbca3a390f5677349e
      https://github.com/llvm/llvm-project/commit/ce7b8343beb61764fafbedfbca3a390f5677349e
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2021-10-22 (Fri, 22 Oct 2021)

  Changed paths:
    R llvm/test/CodeGen/RISCV/rvv/vadd-sdnode-rv32.ll
    R llvm/test/CodeGen/RISCV/rvv/vadd-sdnode-rv64.ll
    A llvm/test/CodeGen/RISCV/rvv/vadd-sdnode.ll
    R llvm/test/CodeGen/RISCV/rvv/vand-sdnode-rv32.ll
    R llvm/test/CodeGen/RISCV/rvv/vand-sdnode-rv64.ll
    A llvm/test/CodeGen/RISCV/rvv/vand-sdnode.ll
    R llvm/test/CodeGen/RISCV/rvv/vdiv-sdnode-rv32.ll
    R llvm/test/CodeGen/RISCV/rvv/vdiv-sdnode-rv64.ll
    A llvm/test/CodeGen/RISCV/rvv/vdiv-sdnode.ll
    R llvm/test/CodeGen/RISCV/rvv/vdivu-sdnode-rv32.ll
    R llvm/test/CodeGen/RISCV/rvv/vdivu-sdnode-rv64.ll
    A llvm/test/CodeGen/RISCV/rvv/vdivu-sdnode.ll
    R llvm/test/CodeGen/RISCV/rvv/vexts-sdnode-rv32.ll
    R llvm/test/CodeGen/RISCV/rvv/vexts-sdnode-rv64.ll
    A llvm/test/CodeGen/RISCV/rvv/vexts-sdnode.ll
    R llvm/test/CodeGen/RISCV/rvv/vmax-sdnode-rv32.ll
    R llvm/test/CodeGen/RISCV/rvv/vmax-sdnode-rv64.ll
    A llvm/test/CodeGen/RISCV/rvv/vmax-sdnode.ll
    R llvm/test/CodeGen/RISCV/rvv/vmaxu-sdnode-rv32.ll
    R llvm/test/CodeGen/RISCV/rvv/vmaxu-sdnode-rv64.ll
    A llvm/test/CodeGen/RISCV/rvv/vmaxu-sdnode.ll
    R llvm/test/CodeGen/RISCV/rvv/vmin-sdnode-rv32.ll
    R llvm/test/CodeGen/RISCV/rvv/vmin-sdnode-rv64.ll
    A llvm/test/CodeGen/RISCV/rvv/vmin-sdnode.ll
    R llvm/test/CodeGen/RISCV/rvv/vminu-sdnode-rv32.ll
    R llvm/test/CodeGen/RISCV/rvv/vminu-sdnode-rv64.ll
    A llvm/test/CodeGen/RISCV/rvv/vminu-sdnode.ll
    R llvm/test/CodeGen/RISCV/rvv/vmul-sdnode-rv32.ll
    R llvm/test/CodeGen/RISCV/rvv/vmul-sdnode-rv64.ll
    A llvm/test/CodeGen/RISCV/rvv/vmul-sdnode.ll
    R llvm/test/CodeGen/RISCV/rvv/vor-sdnode-rv32.ll
    R llvm/test/CodeGen/RISCV/rvv/vor-sdnode-rv64.ll
    A llvm/test/CodeGen/RISCV/rvv/vor-sdnode.ll
    R llvm/test/CodeGen/RISCV/rvv/vrem-sdnode-rv32.ll
    R llvm/test/CodeGen/RISCV/rvv/vrem-sdnode-rv64.ll
    A llvm/test/CodeGen/RISCV/rvv/vrem-sdnode.ll
    R llvm/test/CodeGen/RISCV/rvv/vremu-sdnode-rv32.ll
    R llvm/test/CodeGen/RISCV/rvv/vremu-sdnode-rv64.ll
    A llvm/test/CodeGen/RISCV/rvv/vremu-sdnode.ll
    R llvm/test/CodeGen/RISCV/rvv/vrsub-sdnode-rv32.ll
    R llvm/test/CodeGen/RISCV/rvv/vrsub-sdnode-rv64.ll
    A llvm/test/CodeGen/RISCV/rvv/vrsub-sdnode.ll
    R llvm/test/CodeGen/RISCV/rvv/vshl-sdnode-rv32.ll
    R llvm/test/CodeGen/RISCV/rvv/vshl-sdnode-rv64.ll
    A llvm/test/CodeGen/RISCV/rvv/vshl-sdnode.ll
    R llvm/test/CodeGen/RISCV/rvv/vsra-sdnode-rv32.ll
    R llvm/test/CodeGen/RISCV/rvv/vsra-sdnode-rv64.ll
    A llvm/test/CodeGen/RISCV/rvv/vsra-sdnode.ll
    R llvm/test/CodeGen/RISCV/rvv/vsrl-sdnode-rv32.ll
    R llvm/test/CodeGen/RISCV/rvv/vsrl-sdnode-rv64.ll
    A llvm/test/CodeGen/RISCV/rvv/vsrl-sdnode.ll
    R llvm/test/CodeGen/RISCV/rvv/vsub-sdnode-rv32.ll
    R llvm/test/CodeGen/RISCV/rvv/vsub-sdnode-rv64.ll
    A llvm/test/CodeGen/RISCV/rvv/vsub-sdnode.ll
    R llvm/test/CodeGen/RISCV/rvv/vtruncs-sdnode-rv32.ll
    R llvm/test/CodeGen/RISCV/rvv/vtruncs-sdnode-rv64.ll
    A llvm/test/CodeGen/RISCV/rvv/vtruncs-sdnode.ll
    R llvm/test/CodeGen/RISCV/rvv/vxor-sdnode-rv32.ll
    R llvm/test/CodeGen/RISCV/rvv/vxor-sdnode-rv64.ll
    A llvm/test/CodeGen/RISCV/rvv/vxor-sdnode.ll

  Log Message:
  -----------
  [RISCV] Merge vector tests for rv32 and rv64 into a single test file

These tests have nearly identical content the only difference is
that the rv64 test has a signext attribute on some parameters.
That attribute should be harmless on rv32.

Merge them into a single test file with 2 RUN lines.

Differential Revision: https://reviews.llvm.org/D112242