[all-commits] [llvm/llvm-project] ca0c92: [AMDGPU] Allow to use a whole register file on gfx...

[Stanislav Mekhanoshin via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: ca0c92d6a1cc93ea83411511848644cb217c31ce
      https://github.com/llvm/llvm-project/commit/ca0c92d6a1cc93ea83411511848644cb217c31ce
  Author: Stanislav Mekhanoshin <Stanislav.Mekhanoshin at amd.com>
  Date:   2021-10-21 (Thu, 21 Oct 2021)

  Changed paths:
    M llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.cpp
    M llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.h
    M llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
    M llvm/test/CodeGen/AMDGPU/amdgpu-codegenprepare-idiv.ll
    M llvm/test/CodeGen/AMDGPU/attr-amdgpu-flat-work-group-size-vgpr-limit.ll
    A llvm/test/CodeGen/AMDGPU/vgpr-agpr-limit-gfx90a.ll

  Log Message:
  -----------
  [AMDGPU] Allow to use a whole register file on gfx90a for VGPRs

In a kernel which does not have calls or AGPR usage we can allocate
the whole vector register budget for VGPRs and have no AGPRs as
long as VGPRs stay addressable (i.e. below 256).

Differential Revision: https://reviews.llvm.org/D111764