[all-commits] [llvm/llvm-project] a83384: [X86] combineMulToPMADDWD - replace ASHR(X, 16) -> ...

[Simon Pilgrim via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: a83384498bee076aca07cc88b726e6bd51926e6f
      https://github.com/llvm/llvm-project/commit/a83384498bee076aca07cc88b726e6bd51926e6f
  Author: Simon Pilgrim <llvm-dev at redking.me.uk>
  Date:   2021-10-18 (Mon, 18 Oct 2021)

  Changed paths:
    M llvm/lib/Target/X86/X86ISelLowering.cpp
    M llvm/test/CodeGen/X86/pmulh.ll

  Log Message:
  -----------
  [X86] combineMulToPMADDWD - replace ASHR(X,16) -> LSHR(X,16)

If we're using an ashr to sign-extend the entire upper 16 bits of the i32 element, then we can replace with a lshr. The sign bit will be correctly shifted for PMADDWD's implicit sign-extension and the upper 16 bits are zero so the upper i16 sext-multiply is guaranteed to be zero.

The lshr also has a better chance of folding with shuffles etc.