[all-commits] [llvm/llvm-project] c850d5: [X86][Costmodel] Add SSE2 sub-128bit vXi8/16 strid...

[Simon Pilgrim via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: c850d5c5c8a16b1bc0ba4191cfc9f92c8b2cddef
      https://github.com/llvm/llvm-project/commit/c850d5c5c8a16b1bc0ba4191cfc9f92c8b2cddef
  Author: Simon Pilgrim <llvm-dev at redking.me.uk>
  Date:   2021-10-18 (Mon, 18 Oct 2021)

  Changed paths:
    M llvm/lib/Target/X86/X86TargetTransformInfo.cpp
    M llvm/test/Analysis/CostModel/X86/interleaved-store-i16-stride-2.ll
    M llvm/test/Analysis/CostModel/X86/interleaved-store-i8-stride-2.ll

  Log Message:
  -----------
  [X86][Costmodel] Add SSE2 sub-128bit vXi8/16 stride 2 interleaved store costs

Differential Revision: https://reviews.llvm.org/D111941


  Commit: f04133815360bfbb9c81eaa993845bf5d7dc473c
      https://github.com/llvm/llvm-project/commit/f04133815360bfbb9c81eaa993845bf5d7dc473c
  Author: Simon Pilgrim <llvm-dev at redking.me.uk>
  Date:   2021-10-18 (Mon, 18 Oct 2021)

  Changed paths:
    M llvm/lib/Target/X86/X86TargetTransformInfo.cpp
    M llvm/test/Analysis/CostModel/X86/interleaved-store-f32-stride-2.ll
    M llvm/test/Analysis/CostModel/X86/interleaved-store-i32-stride-2.ll

  Log Message:
  -----------
  [X86][Costmodel] Add SSE2 sub-128bit vXi32/f32 stride 2 interleaved store costs

Differential Revision: https://reviews.llvm.org/D111941


Compare: https://github.com/llvm/llvm-project/compare/b37efed957ed...f04133815360