[all-commits] [llvm/llvm-project] 67c64d: [PowerPC] Implement scheduling model for Power10

[Qiu Chaofan via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 67c64d83378e7e84e30801420ebba453987e2546
      https://github.com/llvm/llvm-project/commit/67c64d83378e7e84e30801420ebba453987e2546
  Author: Qiu Chaofan <qiucofan at cn.ibm.com>
  Date:   2021-10-18 (Mon, 18 Oct 2021)

  Changed paths:
    A llvm/lib/Target/PowerPC/P10InstrResources.td
    M llvm/lib/Target/PowerPC/PPC.td
    A llvm/lib/Target/PowerPC/PPCSchedPredicates.td
    M llvm/lib/Target/PowerPC/PPCSchedule.td
    A llvm/lib/Target/PowerPC/PPCScheduleP10.td
    M llvm/lib/Target/PowerPC/PPCScheduleP9.td
    M llvm/test/CodeGen/PowerPC/builtins-ppc-p10vsx.ll
    M llvm/test/CodeGen/PowerPC/constant-pool.ll
    M llvm/test/CodeGen/PowerPC/int128_ldst.ll
    M llvm/test/CodeGen/PowerPC/mma-acc-spill.ll
    M llvm/test/CodeGen/PowerPC/mma-intrinsics.ll
    M llvm/test/CodeGen/PowerPC/mma-outer-product.ll
    M llvm/test/CodeGen/PowerPC/mma-phi-accs.ll
    M llvm/test/CodeGen/PowerPC/more-dq-form-prepare.ll
    M llvm/test/CodeGen/PowerPC/p10-fi-elim.ll
    M llvm/test/CodeGen/PowerPC/p10-spill-creq.ll
    M llvm/test/CodeGen/PowerPC/p10-spill-crgt.ll
    M llvm/test/CodeGen/PowerPC/p10-spill-crlt.ll
    M llvm/test/CodeGen/PowerPC/p10-spill-crun.ll
    M llvm/test/CodeGen/PowerPC/pcrel-call-linkage-leaf.ll
    M llvm/test/CodeGen/PowerPC/pcrel-call-linkage-with-calls.ll
    M llvm/test/CodeGen/PowerPC/pcrel-jump-table.ll
    M llvm/test/CodeGen/PowerPC/pcrel-tail-calls.ll
    M llvm/test/CodeGen/PowerPC/ppc64-acc-regalloc.ll
    M llvm/test/CodeGen/PowerPC/ppc64-rop-protection.ll
    M llvm/test/CodeGen/PowerPC/scalar-double-ldst.ll
    M llvm/test/CodeGen/PowerPC/scalar-float-ldst.ll
    M llvm/test/CodeGen/PowerPC/scalar-i16-ldst.ll
    M llvm/test/CodeGen/PowerPC/scalar-i32-ldst.ll
    M llvm/test/CodeGen/PowerPC/scalar-i64-ldst.ll
    M llvm/test/CodeGen/PowerPC/scalar-i8-ldst.ll
    M llvm/test/CodeGen/PowerPC/spill-vec-pair.ll
    M llvm/test/CodeGen/PowerPC/testComparesi32gtu.ll
    M llvm/test/CodeGen/PowerPC/testComparesi32ltu.ll

  Log Message:
  -----------
  [PowerPC] Implement scheduling model for Power10

Reviewed By: jsji

Differential Revision: https://reviews.llvm.org/D110855