[all-commits] [llvm/llvm-project] 37edb7: [SVE] Fix incorrect DAG combines when extracting f...

[david-arm via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 37edb7d3e26353ffd8a239b3f850925dc913a6bb
      https://github.com/llvm/llvm-project/commit/37edb7d3e26353ffd8a239b3f850925dc913a6bb
  Author: David Sherwood <david.sherwood at arm.com>
  Date:   2021-10-06 (Wed, 06 Oct 2021)

  Changed paths:
    M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
    A llvm/test/CodeGen/AArch64/sve-extract-fixed-from-scalable-vector.ll

  Log Message:
  -----------
  [SVE] Fix incorrect DAG combines when extracting fixed-width from scalable vectors

We were previously silently generating incorrect code when extracting a
fixed-width vector from a scalable vector. This is worse than crashing,
since the user will have no indication that this is currently unsupported
behaviour. I have fixed the code to only perform DAG combines when safe
to do so, i.e. the input and output vectors are both fixed-width or
both scalable.

Test added here:

  CodeGen/AArch64/sve-extract-scalable-vector.ll

Differential revision: https://reviews.llvm.org/D110624