[all-commits] [llvm/llvm-project] bd2c6e: [InstCombine] add tests for extractelt of bitcaste...

RotateRight via All-commits all-commits at lists.llvm.org
Mon Oct 4 11:32:17 PDT 2021


  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: bd2c6e52bb9c96841adfa5f9cd794e20205babfd
      https://github.com/llvm/llvm-project/commit/bd2c6e52bb9c96841adfa5f9cd794e20205babfd
  Author: Sanjay Patel <spatel at rotateright.com>
  Date:   2021-10-04 (Mon, 04 Oct 2021)

  Changed paths:
    M llvm/test/Transforms/InstCombine/extractelement.ll

  Log Message:
  -----------
  [InstCombine] add tests for extractelt of bitcasted scalar; NFC


  Commit: 6a2a84c253bc9ae55b8d0803e28356c056036053
      https://github.com/llvm/llvm-project/commit/6a2a84c253bc9ae55b8d0803e28356c056036053
  Author: Sanjay Patel <spatel at rotateright.com>
  Date:   2021-10-04 (Mon, 04 Oct 2021)

  Changed paths:
    M llvm/lib/Transforms/InstCombine/InstCombineInternal.h
    M llvm/lib/Transforms/InstCombine/InstructionCombining.cpp

  Log Message:
  -----------
  [InstCombine] add helper for "is desirable int type"; NFC

This splits out the logic from shouldChangeType() that
currently allows 8/16/32-bit transforms even if those
types are not listed as legal in the data layout.

This could be useful as a predicate for vector
insert/extract transforms.

Note that this leaves the subsequent checks in
shouldChangeType() unchanged. We may want to merge
the checks for i1 and/or "ToLegal" into "isDesirable",
but that may alter existing transforms.


Compare: https://github.com/llvm/llvm-project/compare/019041bec324...6a2a84c253bc


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