[all-commits] [llvm/llvm-project] 88a9c1: [InstCombine] add test for shl + demanded bits; NFC

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  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 88a9c1827e8dfd74aa2b2ba4f58ddf557b253c4e
      https://github.com/llvm/llvm-project/commit/88a9c1827e8dfd74aa2b2ba4f58ddf557b253c4e
  Author: Sanjay Patel <spatel at rotateright.com>
  Date:   2021-10-03 (Sun, 03 Oct 2021)

  Changed paths:
    M llvm/test/Transforms/InstCombine/shl-demand.ll

  Log Message:
  -----------
  [InstCombine] add test for shl + demanded bits; NFC

This is a reduction of a test that would infinite loop with D110170.


  Commit: f32c0fe8e50534f4210d878b9a1420793860c567
      https://github.com/llvm/llvm-project/commit/f32c0fe8e50534f4210d878b9a1420793860c567
  Author: Sanjay Patel <spatel at rotateright.com>
  Date:   2021-10-03 (Sun, 03 Oct 2021)

  Changed paths:
    M llvm/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp
    M llvm/test/Transforms/InstCombine/trunc-demand.ll

  Log Message:
  -----------
  [InstCombine] fold cast of right-shift if high bits are not demanded (3rd try)

The first two tries at this were reverted because they caused an
infinite loop in instcombine.
That should be fixed after a series of patches that ended with
removing the faulty opposing transform:
3fabd98e5b3e

Original commit message:
(masked) trunc (lshr X, C) --> (masked) lshr (trunc X), C

Narrowing the shift should be better for analysis and can lead
to follow-on transforms as shown.

Attempt at a general proof in Alive2:
https://alive2.llvm.org/ce/z/tRnnSF

Here are a couple of the specific tests:
https://alive2.llvm.org/ce/z/bCnTp-
https://alive2.llvm.org/ce/z/TfaHnb

Differential Revision: https://reviews.llvm.org/D110170


Compare: https://github.com/llvm/llvm-project/compare/3be4acbaa356...f32c0fe8e505