[all-commits] [llvm/llvm-project] 527859: AMDGPU: Broadcast scalar boolean to vector boolean...

Ruiling, Song via All-commits all-commits at lists.llvm.org
Wed Sep 29 19:19:10 PDT 2021


  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 52785989e95db15f5021f095198f821772d3d656
      https://github.com/llvm/llvm-project/commit/52785989e95db15f5021f095198f821772d3d656
  Author: Ruiling Song <ruiling.song at amd.com>
  Date:   2021-09-30 (Thu, 30 Sep 2021)

  Changed paths:
    M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
    M llvm/test/CodeGen/AMDGPU/expand-scalar-carry-out-select-user.ll

  Log Message:
  -----------
  AMDGPU: Broadcast scalar boolean to vector boolean explicitly

This is used to fix wrong code generation of s_add_co_select_user in
test/CodeGen/AMDGPU/expand-scalar-carry-out-select-user.ll

  s_addc_u32 s4, s6, 0
  s_cselect_b64 vcc, 1, 0    <-- vcc set as 0x1 if SCC==1
  v_mov_b32_e32 v1, s4
  s_cmp_gt_u32 s6, 31
  v_cndmask_b32_e32 v1, 0, v1, vcc

If the s_addc_u32 set SCC, then we will get value 0x1 in VCC.
The v_cndmask will do per thread selection with VCC as condition
register. As VCC only gets the first bit being set, only the first
thread/lane in destination register can get correct result if the
very first lane is active. In fact, we should broadcast the value to all
active lanes of the final register.

The idea here is doing this broadcast to vector boolean explicitly
instead of lowering it into a COPY from SCC which would be interpreted as
selecting between 0/1.

This is used to replace D109754.

Reviewed-by: foad, alex-t

Differential Revision: https://reviews.llvm.org/D109889




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