[all-commits] [llvm/llvm-project] 7d5262: [X86][Costmodel] Load/store i8 Stride=2 VF=2 inter...

Roman Lebedev via All-commits all-commits at lists.llvm.org
Wed Sep 29 11:53:30 PDT 2021


  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 7d52628eb0eba6cd27adf7f1b34dc3fb0d9b3a7e
      https://github.com/llvm/llvm-project/commit/7d52628eb0eba6cd27adf7f1b34dc3fb0d9b3a7e
  Author: Roman Lebedev <lebedev.ri at gmail.com>
  Date:   2021-09-29 (Wed, 29 Sep 2021)

  Changed paths:
    M llvm/lib/Target/X86/X86TargetTransformInfo.cpp
    M llvm/test/Analysis/CostModel/X86/interleaved-load-i8-stride-2.ll
    M llvm/test/Analysis/CostModel/X86/interleaved-store-i8-stride-2.ll

  Log Message:
  -----------
  [X86][Costmodel] Load/store i8 Stride=2 VF=2 interleaving costs

The only sched models that for cpu's that support avx2
but not avx512 are: haswell, broadwell, skylake, zen1-3

For load we have:
https://godbolt.org/z/caKqjr9hb - for intels `Block RThroughput: =2.0`; for ryzens, `Block RThroughput: <=1.0`
So pick cost of `2`.

For store we have:
https://godbolt.org/z/6TTn3eKj8 - for intels `Block RThroughput: =1.0`; for ryzens, `Block RThroughput: <=0.5`
So pick cost of `1`.

I'm directly using the shuffling asm the llc produced,
without any manual fixups that may be needed
to ensure sequential execution.

Reviewed By: RKSimon

Differential Revision: https://reviews.llvm.org/D110702


  Commit: 08face1f9a9111216c9a3ebf47ef401f633933b6
      https://github.com/llvm/llvm-project/commit/08face1f9a9111216c9a3ebf47ef401f633933b6
  Author: Roman Lebedev <lebedev.ri at gmail.com>
  Date:   2021-09-29 (Wed, 29 Sep 2021)

  Changed paths:
    M llvm/lib/Target/X86/X86TargetTransformInfo.cpp
    M llvm/test/Analysis/CostModel/X86/interleaved-load-i8-stride-2.ll
    M llvm/test/Analysis/CostModel/X86/interleaved-store-i8-stride-2.ll

  Log Message:
  -----------
  [X86][Costmodel] Load/store i8 Stride=2 VF=4 interleaving costs

The only sched models that for cpu's that support avx2
but not avx512 are: haswell, broadwell, skylake, zen1-3

Identical to VF=2.

For load we have:
https://godbolt.org/z/sGE41GYo7 - for intels `Block RThroughput: =2.0`; for ryzens, `Block RThroughput: <=1.0`
So pick cost of `2`.

For store we have:
https://godbolt.org/z/ba5r3s9xa - for intels `Block RThroughput: =1.0`; for ryzens, `Block RThroughput: <=0.5`
So pick cost of `1`.

I'm directly using the shuffling asm the llc produced,
without any manual fixups that may be needed
to ensure sequential execution.

Reviewed By: RKSimon

Differential Revision: https://reviews.llvm.org/D110704


  Commit: 19621856712155a5bdffd3168e6cb36b84c78fa8
      https://github.com/llvm/llvm-project/commit/19621856712155a5bdffd3168e6cb36b84c78fa8
  Author: Roman Lebedev <lebedev.ri at gmail.com>
  Date:   2021-09-29 (Wed, 29 Sep 2021)

  Changed paths:
    M llvm/lib/Target/X86/X86TargetTransformInfo.cpp
    M llvm/test/Analysis/CostModel/X86/interleaved-load-i8-stride-2.ll
    M llvm/test/Analysis/CostModel/X86/interleaved-store-i8-stride-2.ll

  Log Message:
  -----------
  [X86][Costmodel] Load/store i8 Stride=2 VF=8 interleaving costs

The only sched models that for cpu's that support avx2
but not avx512 are: haswell, broadwell, skylake, zen1-3

Identical to VF=2.

For load we have:
https://godbolt.org/z/4TEbdzbMM - for intels `Block RThroughput: =2.0`; for ryzens, `Block RThroughput: <=1.0`
So pick cost of `2`.

For store we have:
https://godbolt.org/z/MYfzGPf3Y - for intels `Block RThroughput: =1.0`; for ryzens, `Block RThroughput: <=0.5`
So pick cost of `1`.

I'm directly using the shuffling asm the llc produced,
without any manual fixups that may be needed
to ensure sequential execution.

Reviewed By: RKSimon

Differential Revision: https://reviews.llvm.org/D110705


  Commit: bac60c55e0ff88f0f61ffed330374699216e1329
      https://github.com/llvm/llvm-project/commit/bac60c55e0ff88f0f61ffed330374699216e1329
  Author: Roman Lebedev <lebedev.ri at gmail.com>
  Date:   2021-09-29 (Wed, 29 Sep 2021)

  Changed paths:
    M llvm/lib/Target/X86/X86TargetTransformInfo.cpp
    M llvm/test/Analysis/CostModel/X86/interleaved-load-i8-stride-2.ll
    M llvm/test/Analysis/CostModel/X86/interleaved-store-i8-stride-2.ll

  Log Message:
  -----------
  [X86][Costmodel] Load/store i8 Stride=2 VF=16 interleaving costs

The only sched models that for cpu's that support avx2
but not avx512 are: haswell, broadwell, skylake, zen1-3

For load we have:
https://godbolt.org/z/a9hv4z47v - for intels `Block RThroughput: =4.0`; for ryzens, `Block RThroughput: =2.0`
So pick cost of `4`.

For store we have:
https://godbolt.org/z/6GfPn1b79 - for intels `Block RThroughput: =3.0`; for ryzens, `Block RThroughput: <=2.0`
So pick cost of `3`.

I'm directly using the shuffling asm the llc produced,
without any manual fixups that may be needed
to ensure sequential execution.

Reviewed By: RKSimon

Differential Revision: https://reviews.llvm.org/D110708


  Commit: 2d42a192e02af9d89dde356a48270fc7d1ef5b16
      https://github.com/llvm/llvm-project/commit/2d42a192e02af9d89dde356a48270fc7d1ef5b16
  Author: Roman Lebedev <lebedev.ri at gmail.com>
  Date:   2021-09-29 (Wed, 29 Sep 2021)

  Changed paths:
    M llvm/lib/Target/X86/X86TargetTransformInfo.cpp
    M llvm/test/Analysis/CostModel/X86/interleaved-load-i8-stride-2.ll
    M llvm/test/Analysis/CostModel/X86/interleaved-store-i8-stride-2.ll

  Log Message:
  -----------
  [X86][Costmodel] Load/store i8 Stride=2 VF=32 interleaving costs

The only sched models that for cpu's that support avx2
but not avx512 are: haswell, broadwell, skylake, zen1-3

For load we have:
https://godbolt.org/z/xz6x7c35P - for intels `Block RThroughput: =6.0`; for ryzens, `Block RThroughput: <=2.5`
So pick cost of `6`.

For store we have:
https://godbolt.org/z/xz6x7c35P - for intels `Block RThroughput: =4.0`; for ryzens, `Block RThroughput: <=2.0`
So pick cost of `4`.

I'm directly using the shuffling asm the llc produced,
without any manual fixups that may be needed
to ensure sequential execution.

Reviewed By: RKSimon

Differential Revision: https://reviews.llvm.org/D110709


Compare: https://github.com/llvm/llvm-project/compare/8911fbeafe57...2d42a192e02a


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