[all-commits] [llvm/llvm-project] 682e15: [PowerPC] Fix td pattern for P10 VSLDBI and VSRDBI

[Quinn Pham via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 682e15f371db9b515d95fe9571983f1070bbc805
      https://github.com/llvm/llvm-project/commit/682e15f371db9b515d95fe9571983f1070bbc805
  Author: Quinn Pham <Quinn.Pham at ibm.com>
  Date:   2021-09-27 (Mon, 27 Sep 2021)

  Changed paths:
    M llvm/lib/Target/PowerPC/PPCInstrPrefix.td

  Log Message:
  -----------
  [PowerPC] Fix td pattern for P10 VSLDBI and VSRDBI

This patch fixes the pattern for the P10 instructions Vector Shift Left
Double by Bit Immediate VN-form and Vector Shift Right Double by Bit
Immediate VN-form. The third argument should be a target constant (`timm`)
instead of an `i32` because an immediate is expected.

Reviewed By: lei

Differential Revision: https://reviews.llvm.org/D109920