[all-commits] [llvm/llvm-project] 933182: [RISCV] Improve support for forming widening multi...

[Craig Topper via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 933182e948bbaf309dc9fd58bac875e7664503dd
      https://github.com/llvm/llvm-project/commit/933182e948bbaf309dc9fd58bac875e7664503dd
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2021-09-27 (Mon, 27 Sep 2021)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
    M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vwmul.ll
    M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vwmulu.ll

  Log Message:
  -----------
  [RISCV] Improve support for forming widening multiplies when one input is a scalar splat.

If one input of a fixed vector multiply is a sign/zero extend and
the other operand is a splat of a scalar, we can use a widening
multiply if the scalar value has sufficient sign/zero bits.

Reviewed By: frasercrmck

Differential Revision: https://reviews.llvm.org/D110028