[all-commits] [llvm/llvm-project] 025a80: [InstCombine] match variable names and code commen...

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Mon Sep 27 07:58:53 PDT 2021


  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 025a805d7ca2331fbdff546f62cce2350aac0cc1
      https://github.com/llvm/llvm-project/commit/025a805d7ca2331fbdff546f62cce2350aac0cc1
  Author: Sanjay Patel <spatel at rotateright.com>
  Date:   2021-09-27 (Mon, 27 Sep 2021)

  Changed paths:
    M llvm/lib/Transforms/InstCombine/InstCombineShifts.cpp

  Log Message:
  -----------
  [InstCombine] match variable names and code comments; NFC

Similar to:
29c09c7

Planned follow-up is to add a transform here to allow removing
a common shift fold that is conflicting with D110170.


  Commit: 21429cf43a41d4ff1263dd601d5e5f81a6387cd0
      https://github.com/llvm/llvm-project/commit/21429cf43a41d4ff1263dd601d5e5f81a6387cd0
  Author: Sanjay Patel <spatel at rotateright.com>
  Date:   2021-09-27 (Mon, 27 Sep 2021)

  Changed paths:
    M llvm/lib/Transforms/InstCombine/InstCombineShifts.cpp
    M llvm/test/Transforms/InstCombine/lshr.ll
    M llvm/test/Transforms/InstCombine/shift.ll

  Log Message:
  -----------
  [InstCombine] generalize fold for (trunc (X u>> C1)) u>> C

This is another step towards trying to re-apply D110170
by eliminating conflicting transforms that cause infinite loops.
a47c8e40c734 was a previous patch in this direction.

The diffs here are mostly cosmetic, but intentional:
1. The existing code that would handle this pattern in FoldShiftByConstant()
   is limited to 'shl' only now. The formatting change to IsLeftShift shows
   that we could move several transforms into visitShl() directly for
   efficiency because they are not common shift transforms.

2. The tests are regenerated to show new instruction names to prove that
   we are getting (almost) identical logic results.

3. The one case where we differ ("trunc_sandwich_small_shift1") shows that
   we now use a narrow 'and' instruction. Previously, we relied on another
   transform to do that, but it is limited to legal types. That seems to
   be a legacy constraint from when IR analysis and codegen were less robust.

https://alive2.llvm.org/ce/z/JxyGA4

  declare void @llvm.assume(i1)

  define i8 @src(i32 %x, i32 %c0, i8 %c1) {
    ; The sum of the shifts must not overflow the source width.
    %z1 = zext i8 %c1 to i32
    %sum = add i32 %c0, %z1
    %ov = icmp ult i32 %sum, 32
    call void @llvm.assume(i1 %ov)

    %sh1 = lshr i32 %x, %c0
    %tr = trunc i32 %sh1 to i8
    %sh2 = lshr i8 %tr, %c1
    ret i8 %sh2
  }

  define i8 @tgt(i32 %x, i32 %c0, i8 %c1) {
    %z1 = zext i8 %c1 to i32
    %sum = add i32 %c0, %z1
    %maskc = lshr i8 -1, %c1

    %s = lshr i32 %x, %sum
    %t = trunc i32 %s to i8
    %a = and i8 %t, %maskc
    ret i8 %a
  }


Compare: https://github.com/llvm/llvm-project/compare/1f5b60ad47f1...21429cf43a41


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