[all-commits] [llvm/llvm-project] a25f25: [X86] combineShiftToPMULH - relax from ISA from SS...

[Simon Pilgrim via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: a25f25c3b7ebce869c33cb7ae48ebf9681b99210
      https://github.com/llvm/llvm-project/commit/a25f25c3b7ebce869c33cb7ae48ebf9681b99210
  Author: Simon Pilgrim <llvm-dev at redking.me.uk>
  Date:   2021-09-25 (Sat, 25 Sep 2021)

  Changed paths:
    M llvm/lib/Target/X86/X86ISelLowering.cpp
    M llvm/test/CodeGen/X86/pmulh.ll

  Log Message:
  -----------
  [X86] combineShiftToPMULH - relax from ISA from SSE41 to SSE2

With improved shuffle combines (in particular canonicalizeShuffleWithBinOps), we can now usefully perform this on any SSE2+ target.

We should be able to remove this entirely and just use DAGCombiner's combineShiftToMULH if we can someday get it to support illegal (pre-widened) types.