[all-commits] [llvm/llvm-project] e4c46d: [GlobalISel] Improve elimination of dead instructi...
petar-avramovic via All-commits
all-commits at lists.llvm.org
Mon Sep 20 04:02:13 PDT 2021
Branch: refs/heads/main
Home: https://github.com/llvm/llvm-project
Commit: e4c46ddd91eba5ec162225abc1e47aa3c6c13516
https://github.com/llvm/llvm-project/commit/e4c46ddd91eba5ec162225abc1e47aa3c6c13516
Author: Petar Avramovic <Petar.Avramovic at amd.com>
Date: 2021-09-20 (Mon, 20 Sep 2021)
Changed paths:
M llvm/include/llvm/CodeGen/GlobalISel/Utils.h
M llvm/lib/CodeGen/GlobalISel/Legalizer.cpp
M llvm/lib/CodeGen/GlobalISel/Utils.cpp
M llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
M llvm/test/CodeGen/AArch64/GlobalISel/artifact-find-value.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-add.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-and.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-bswap.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-extload.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-extract-vector-elt.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-extracts.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-inserts.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-load-store.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-merge-values.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-phi-insertpt-decrement.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-phi.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-sadde.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-saddo.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-saddsat.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-shift.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-shuffle-vector.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-ssube.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-ssubo.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-ssubsat.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-uadde.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-uaddo.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-unmerge-values.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-usube.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-usubo.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/artifact-combiner-extract.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/artifact-combiner-trunc.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/artifact-combiner-unmerge-values.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/artifact-combiner-zext.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/bug-legalization-artifact-combiner-dead-def.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-add.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-and.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-anyext.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-ashr.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-bitcast.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-brcond.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-bswap.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-build-vector.s16.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-concat-vectors.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-ctlz-zero-undef.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-ctlz.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-extract-vector-elt.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-extract.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fabs.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fadd.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fcanonicalize.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fcos.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fdiv.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-ffloor.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fma.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fmaxnum.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fminnum.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fmul.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fneg.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fpext.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-freeze.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fshl.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fshr.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fsin.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fsqrt.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fsub.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-icmp.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-implicit-def-s1025.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-implicit-def.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-insert-vector-elt.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-intrinsic-round.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-llvm.amdgcn.image.dim.a16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-llvm.amdgcn.image.load.2d.d16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-llvm.amdgcn.image.load.2d.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-llvm.amdgcn.image.store.2d.d16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-constant.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-flat.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-global.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-local.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-private.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-lshr.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-memcpy.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-memcpyinline.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-memmove.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-memset.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-mul.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-or.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-phi.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-sadde.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-saddo.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-saddsat.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-sdiv.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-select.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-sext-inreg.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-sext.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-shl.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-shuffle-vector.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-shuffle-vector.s16.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-smax.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-smin.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-smulo.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-sshlsat.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-ssube.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-ssubo.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-ssubsat.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-store-global.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-store.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-sub.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-uadde.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-uaddo.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-uaddsat.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-udiv.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-umax.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-umin.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-umulh.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-umulo.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-unmerge-values.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-ushlsat.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-usube.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-usubo.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-usubsat.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-xor.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-zext.mir
M llvm/test/CodeGen/ARM/GlobalISel/arm-legalize-fp.mir
M llvm/test/CodeGen/Mips/GlobalISel/legalizer/bitwise.mir
M llvm/test/CodeGen/Mips/GlobalISel/legalizer/constants.mir
M llvm/test/CodeGen/Mips/GlobalISel/legalizer/trunc.mir
M llvm/test/CodeGen/Mips/GlobalISel/legalizer/zextLoad_and_sextLoad.mir
M llvm/test/CodeGen/Mips/GlobalISel/legalizer/zext_and_sext.mir
M llvm/test/CodeGen/X86/GlobalISel/legalize-ashr-scalar.mir
M llvm/test/CodeGen/X86/GlobalISel/legalize-lshr-scalar.mir
M llvm/test/CodeGen/X86/GlobalISel/legalize-shl-scalar.mir
Log Message:
-----------
[GlobalISel] Improve elimination of dead instructions in legalizer
Add eraseInstr(s) utility functions. Before deleting an instruction
collects its use instructions. After deletion deletes use instructions
that became trivially dead.
This patch clears all dead instructions in existing legalizer mir tests.
Differential Revision: https://reviews.llvm.org/D109154
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