[all-commits] [llvm/llvm-project] e381d8: [X86][Atom] Fix (U)COMISS/SD uops, latency and thr...

Simon Pilgrim via All-commits all-commits at lists.llvm.org
Sun Sep 19 05:02:48 PDT 2021


  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: e381d8b24329cae6408205f74d0d6d9eaa6b29cf
      https://github.com/llvm/llvm-project/commit/e381d8b24329cae6408205f74d0d6d9eaa6b29cf
  Author: Simon Pilgrim <llvm-dev at redking.me.uk>
  Date:   2021-09-19 (Sun, 19 Sep 2021)

  Changed paths:
    M llvm/lib/Target/X86/X86ScheduleAtom.td
    M llvm/test/tools/llvm-mca/X86/Atom/resources-sse1.s
    M llvm/test/tools/llvm-mca/X86/Atom/resources-sse2.s

  Log Message:
  -----------
  [X86][Atom] Fix (U)COMISS/SD uops, latency and throughput

Both ports are required, for reg and mem variants - we can also use the WriteFComX class directly and remove the unnecessary InstRW overrides. Matches what Intel AoM / Agner / InstLatX64 report as well.




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