[all-commits] [llvm/llvm-project] 5f1a1a: [mlir][Linalg] Properly order extract_slice traver...

Nicolas Vasilache via All-commits all-commits at lists.llvm.org
Fri Sep 10 00:10:20 PDT 2021


  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 5f1a1af4bfb1314081e259939ff313eade72aeab
      https://github.com/llvm/llvm-project/commit/5f1a1af4bfb1314081e259939ff313eade72aeab
  Author: Nicolas Vasilache <nicolas.vasilache at gmail.com>
  Date:   2021-09-10 (Fri, 10 Sep 2021)

  Changed paths:
    M mlir/lib/Dialect/Linalg/Transforms/ComprehensiveBufferize.cpp
    M mlir/test/Dialect/Linalg/comprehensive-module-bufferize-analysis.mlir

  Log Message:
  -----------
  [mlir][Linalg] Properly order extract_slice traversal in comprehensive bufferization

This revision fixes the traversal order of extract_slice during the inplace analysis.
It was previously thought that such ops could be analyzed at the very end.
This is unfortunately not true as the AliasInfo for dependents of these ops need to be updated.

This change allows the aliases introduced by the bufferization of extract_slice to be properly propagated.

Differential Revision: https://reviews.llvm.org/D109519




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