[all-commits] [llvm/llvm-project] ac4896: [GlobalISel] Add G_ROTL and G_ROTR to right_identi...

[Jessica Paquette via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: ac4896e2f37296ef47aa6f03723d275de23180f7
      https://github.com/llvm/llvm-project/commit/ac4896e2f37296ef47aa6f03723d275de23180f7
  Author: Jessica Paquette <jpaquette at apple.com>
  Date:   2021-09-08 (Wed, 08 Sep 2021)

  Changed paths:
    M llvm/include/llvm/Target/GlobalISel/Combine.td
    M llvm/test/CodeGen/AArch64/GlobalISel/postlegalizercombiner-rotate.mir
    M llvm/test/CodeGen/AArch64/GlobalISel/prelegalizercombiner-trivial-arith.mir

  Log Message:
  -----------
  [GlobalISel] Add G_ROTL and G_ROTR to right_identity_zero

Similar to `DAGCombiner::visitRotate`.

This makes `rotl_bitwidth_cst` in postlegalizercombiner-rotate.mir reduce down
to a COPY. Modify the checkline to make sure that only rotate_out_of_range
runs there.

Differential Revision: https://reviews.llvm.org/D109264