[all-commits] [llvm/llvm-project] d8d24c: [DAG] Fix GT -> GE condition when creating SetCC

[David Green via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: d8d24c64fe21948d0d4faf60e7a0ce6ba21b0b1a
      https://github.com/llvm/llvm-project/commit/d8d24c64fe21948d0d4faf60e7a0ce6ba21b0b1a
  Author: David Green <david.green at arm.com>
  Date:   2021-09-08 (Wed, 08 Sep 2021)

  Changed paths:
    M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
    M llvm/test/CodeGen/AArch64/select-constant-xor.ll
    M llvm/test/CodeGen/AMDGPU/select-constant-xor.ll
    M llvm/test/CodeGen/ARM/select-constant-xor.ll
    M llvm/test/CodeGen/PowerPC/select-constant-xor.ll
    M llvm/test/CodeGen/RISCV/select-constant-xor.ll
    M llvm/test/CodeGen/X86/select-constant-xor.ll

  Log Message:
  -----------
  [DAG] Fix GT -> GE condition when creating SetCC

79845ed6dfc6511f99 folded some setcc(ashr) conditions to setcc, but got
the condition for NE incorrect, using GT where it should be using GE.