[all-commits] [llvm/llvm-project] 2005ae: [X86][SLM] WriteVecIMul instructions only take 1uo...

[Simon Pilgrim via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 2005ae15a66dd5d8a9845f3652192a70bd36d921
      https://github.com/llvm/llvm-project/commit/2005ae15a66dd5d8a9845f3652192a70bd36d921
  Author: Simon Pilgrim <llvm-dev at redking.me.uk>
  Date:   2021-09-04 (Sat, 04 Sep 2021)

  Changed paths:
    M llvm/lib/Target/X86/X86ScheduleSLM.td
    M llvm/test/CodeGen/X86/slow-pmulld.ll
    M llvm/test/tools/llvm-mca/X86/SLM/resources-sse2.s
    M llvm/test/tools/llvm-mca/X86/SLM/resources-sse41.s
    M llvm/test/tools/llvm-mca/X86/SLM/resources-ssse3.s

  Log Message:
  -----------
  [X86][SLM] WriteVecIMul instructions only take 1uop (REAPPLIED)

The xmm variant have half the throughput (and +1cy latency) of the mmx variants, but are still 1uop.

I still need to do more thorough testing of SLM on test-suite before fixing the obvious bad numbers for WritePMULLD.

But this helps the D103695 helper script get to more accurate numbers for vXi32 multiplies of extended operands (i.e. we can use PMADDWD, PMULLW/PMULHW etc). Matches what Intel AoM / Agner / llvm-exegesis reports.


  Commit: cb8d96e72f4c41b86738a5347a5c15e98037f358
      https://github.com/llvm/llvm-project/commit/cb8d96e72f4c41b86738a5347a5c15e98037f358
  Author: Simon Pilgrim <llvm-dev at redking.me.uk>
  Date:   2021-09-04 (Sat, 04 Sep 2021)

  Changed paths:
    M llvm/lib/ProfileData/SampleProfReader.cpp

  Log Message:
  -----------
  Fix Wdocumentation unknown parameter warning. NFCI.


Compare: https://github.com/llvm/llvm-project/compare/ac51d6920871...cb8d96e72f4c