[all-commits] [llvm/llvm-project] a78dd7: [SLP][RISCV] Implement unsigned getMinVectorRegist...

[Luke via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: a78dd726f46de63529585b2569314d35ce39105d
      https://github.com/llvm/llvm-project/commit/a78dd726f46de63529585b2569314d35ce39105d
  Author: Luke <luke957 at foxmail.com>
  Date:   2021-09-01 (Wed, 01 Sep 2021)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h

  Log Message:
  -----------
  [SLP][RISCV] Implement unsigned getMinVectorRegisterBitWidth() for RISCV

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D108973