[all-commits] [llvm/llvm-project] 789f01: [SelectionDAG] Fix miscompile bugs related to smul...

[Björn Pettersson via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 789f01283d52065b10049b58a3288c4abd1ef351
      https://github.com/llvm/llvm-project/commit/789f01283d52065b10049b58a3288c4abd1ef351
  Author: Bjorn Pettersson <bjorn.a.pettersson at ericsson.com>
  Date:   2021-08-30 (Mon, 30 Aug 2021)

  Changed paths:
    M llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
    M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
    M llvm/test/CodeGen/X86/smul_fix_sat.ll
    M llvm/test/CodeGen/X86/smul_fix_sat_constants.ll

  Log Message:
  -----------
  [SelectionDAG] Fix miscompile bugs related to smul.fix.sat with scale zero

When expanding a SMULFIXSAT ISD node (usually originating from
a smul.fix.sat intrinsic) we've applied some optimizations for
the special case when the scale is zero. The idea has been that
it would be cheaper to use an SMULO instruction (if legal) to
perform the multiplication and at the same time detect any overflow.
And in case of overflow we could use some SELECT:s to replace the
result with the saturated min/max value. The only tricky part
is to know if we overflowed on the min or max value, i.e. if the
product is positive or negative. Unfortunately the implementation
has been incorrect as it has looked at the product returned by the
SMULO to determine the sign of the product. In case of overflow that
product is truncated and won't give us the correct sign bit.

This patch is adding an extra XOR of the multiplication operands,
which is used to determine the sign of the non truncated product.

This patch fixes PR51677.

Reviewed By: lebedev.ri

Differential Revision: https://reviews.llvm.org/D108938