[all-commits] [llvm/llvm-project] ab40db: [X86] AVX512FP16 instructions enabling 6/6
Pengfei Wang via All-commits
all-commits at lists.llvm.org
Sun Aug 29 23:58:05 PDT 2021
Branch: refs/heads/main
Home: https://github.com/llvm/llvm-project
Commit: ab40dbfe03d50a2e4a12168beb0ad9ae660916cf
https://github.com/llvm/llvm-project/commit/ab40dbfe03d50a2e4a12168beb0ad9ae660916cf
Author: Wang, Pengfei <pengfei.wang at intel.com>
Date: 2021-08-30 (Mon, 30 Aug 2021)
Changed paths:
M clang/include/clang/Basic/BuiltinsX86.def
M clang/lib/Headers/avx512fp16intrin.h
M clang/lib/Headers/avx512vlfp16intrin.h
M clang/lib/Sema/SemaChecking.cpp
M clang/test/CodeGen/X86/avx512fp16-builtins.c
M clang/test/CodeGen/X86/avx512vlfp16-builtins.c
M llvm/include/llvm/IR/IntrinsicsX86.td
M llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/lib/Target/X86/X86ISelLowering.h
M llvm/lib/Target/X86/X86InstrAVX512.td
M llvm/lib/Target/X86/X86InstrFoldTables.cpp
M llvm/lib/Target/X86/X86InstrFragmentsSIMD.td
M llvm/lib/Target/X86/X86IntrinsicsInfo.h
A llvm/test/CodeGen/X86/avx512cfma-intrinsics.ll
A llvm/test/CodeGen/X86/avx512cfmul-intrinsics.ll
A llvm/test/CodeGen/X86/avx512cfmulsh-instrinsics.ll
A llvm/test/CodeGen/X86/avx512fp16-combine-vfmulc-fadd.ll
A llvm/test/CodeGen/X86/avx512fp16-combine-xor-vfmulc-fadd.ll
A llvm/test/CodeGen/X86/avx512fp16-combine-xor-vfmulc.ll
M llvm/test/CodeGen/X86/stack-folding-fp-avx512fp16.ll
M llvm/test/CodeGen/X86/stack-folding-fp-avx512fp16vl.ll
M llvm/test/MC/Disassembler/X86/avx512fp16.txt
M llvm/test/MC/Disassembler/X86/avx512fp16vl.txt
A llvm/test/MC/X86/avx512fp16-complex-fma.s
A llvm/test/MC/X86/avx512fp16-complex-fma_vl.s
M llvm/test/MC/X86/avx512fp16.s
M llvm/test/MC/X86/avx512fp16vl.s
M llvm/test/MC/X86/intel-syntax-avx512fp16.s
M llvm/test/MC/X86/intel-syntax-avx512fp16vl.s
Log Message:
-----------
[X86] AVX512FP16 instructions enabling 6/6
Enable FP16 complex FMA instructions.
Ref.: https://software.intel.com/content/www/us/en/develop/download/intel-avx512-fp16-architecture-specification.html
Reviewed By: LuoYuanke
Differential Revision: https://reviews.llvm.org/D105269
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