[all-commits] [llvm/llvm-project] ed0f44: [AMDGPU] Divergence-driven compare operations inst...

[alex-t via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: ed0f4415f002c34ef85e1e4ac2f676cf5314afbe
      https://github.com/llvm/llvm-project/commit/ed0f4415f002c34ef85e1e4ac2f676cf5314afbe
  Author: alex-t <alexander.timofeev at amd.com>
  Date:   2021-08-25 (Wed, 25 Aug 2021)

  Changed paths:
    M llvm/lib/Target/AMDGPU/SIFixSGPRCopies.cpp
    M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
    M llvm/lib/Target/AMDGPU/SIInstrInfo.h
    M llvm/lib/Target/AMDGPU/SIInstrInfo.td
    M llvm/test/CodeGen/AMDGPU/addrspacecast.ll
    M llvm/test/CodeGen/AMDGPU/amdgcn.private-memory.ll
    M llvm/test/CodeGen/AMDGPU/amdgpu-codegenprepare-idiv.ll
    M llvm/test/CodeGen/AMDGPU/anyext.ll
    M llvm/test/CodeGen/AMDGPU/branch-relaxation.ll
    M llvm/test/CodeGen/AMDGPU/cndmask-no-def-vcc.ll
    M llvm/test/CodeGen/AMDGPU/control-flow-optnone.ll
    M llvm/test/CodeGen/AMDGPU/ctlz.ll
    M llvm/test/CodeGen/AMDGPU/expand-scalar-carry-out-select-user.ll
    M llvm/test/CodeGen/AMDGPU/extract_vector_dynelt.ll
    M llvm/test/CodeGen/AMDGPU/extract_vector_elt-f64.ll
    M llvm/test/CodeGen/AMDGPU/extract_vector_elt-i64.ll
    M llvm/test/CodeGen/AMDGPU/extractelt-to-trunc.ll
    M llvm/test/CodeGen/AMDGPU/global-load-saddr-to-vaddr.ll
    M llvm/test/CodeGen/AMDGPU/i1-copy-from-loop.ll
    M llvm/test/CodeGen/AMDGPU/icmp64.ll
    M llvm/test/CodeGen/AMDGPU/idiv-licm.ll
    M llvm/test/CodeGen/AMDGPU/insert_vector_dynelt.ll
    M llvm/test/CodeGen/AMDGPU/insert_vector_elt.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.div.fmas.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.icmp.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.is.private.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.is.shared.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.kill.ll
    M llvm/test/CodeGen/AMDGPU/llvm.mulo.ll
    M llvm/test/CodeGen/AMDGPU/llvm.round.f64.ll
    M llvm/test/CodeGen/AMDGPU/load-select-ptr.ll
    M llvm/test/CodeGen/AMDGPU/min.ll
    M llvm/test/CodeGen/AMDGPU/move-load-addr-to-valu.mir
    M llvm/test/CodeGen/AMDGPU/optimize-negated-cond.ll
    M llvm/test/CodeGen/AMDGPU/or.ll
    M llvm/test/CodeGen/AMDGPU/sad.ll
    M llvm/test/CodeGen/AMDGPU/saddo.ll
    M llvm/test/CodeGen/AMDGPU/sdiv.ll
    M llvm/test/CodeGen/AMDGPU/select-constant-cttz.ll
    M llvm/test/CodeGen/AMDGPU/select-fabs-fneg-extract.ll
    M llvm/test/CodeGen/AMDGPU/select-opt.ll
    M llvm/test/CodeGen/AMDGPU/select-vectors.ll
    M llvm/test/CodeGen/AMDGPU/selectcc-opt.ll
    M llvm/test/CodeGen/AMDGPU/selectcc.ll
    M llvm/test/CodeGen/AMDGPU/setcc-opt.ll
    M llvm/test/CodeGen/AMDGPU/setcc.ll
    M llvm/test/CodeGen/AMDGPU/setcc64.ll
    M llvm/test/CodeGen/AMDGPU/shift-i128.ll
    M llvm/test/CodeGen/AMDGPU/si-annotate-cf.ll
    M llvm/test/CodeGen/AMDGPU/si-annotate-cfg-loop-assert.ll
    M llvm/test/CodeGen/AMDGPU/sign_extend.ll
    M llvm/test/CodeGen/AMDGPU/sint_to_fp.f64.ll
    M llvm/test/CodeGen/AMDGPU/sint_to_fp.ll
    M llvm/test/CodeGen/AMDGPU/skip-if-dead.ll
    M llvm/test/CodeGen/AMDGPU/splitkit-getsubrangeformask.ll
    M llvm/test/CodeGen/AMDGPU/udiv64.ll
    M llvm/test/CodeGen/AMDGPU/udivrem.ll
    M llvm/test/CodeGen/AMDGPU/uint_to_fp.f64.ll
    M llvm/test/CodeGen/AMDGPU/uint_to_fp.ll
    M llvm/test/CodeGen/AMDGPU/undefined-subreg-liverange.ll
    M llvm/test/CodeGen/AMDGPU/uniform-cfg.ll
    M llvm/test/CodeGen/AMDGPU/v_cndmask.ll
    M llvm/test/CodeGen/AMDGPU/vector-alloca-bitcast.ll
    M llvm/test/CodeGen/AMDGPU/vector-extract-insert.ll
    M llvm/test/CodeGen/AMDGPU/vselect.ll
    M llvm/test/CodeGen/AMDGPU/wave32.ll
    M llvm/test/CodeGen/AMDGPU/zero_extend.ll

  Log Message:
  -----------
  [AMDGPU] Divergence-driven compare operations instruction selection

Description: This change enables the compare operations to be selected to SALU/VALU form
             dependent of the SDNode divergence flag.

Reviewed By: rampitec

Differential Revision: https://reviews.llvm.org/D106079