[all-commits] [llvm/llvm-project] 2bf4ee: [GlobalISel] Avoid creating COPY in LegalizationAr...
petar-avramovic via All-commits
all-commits at lists.llvm.org
Tue Aug 24 02:12:44 PDT 2021
Branch: refs/heads/main
Home: https://github.com/llvm/llvm-project
Commit: 2bf4eeeeb60daba9534dd55088067fcf5a65f86b
https://github.com/llvm/llvm-project/commit/2bf4eeeeb60daba9534dd55088067fcf5a65f86b
Author: Petar Avramovic <Petar.Avramovic at amd.com>
Date: 2021-08-24 (Tue, 24 Aug 2021)
Changed paths:
M llvm/include/llvm/CodeGen/GlobalISel/LegalizationArtifactCombiner.h
M llvm/test/CodeGen/AArch64/GlobalISel/arm64-atomic.ll
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-and.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-atomicrmw.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-bswap.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-cmp.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-cmpxchg-with-success.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-cmpxchg.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-combines.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-ctpop.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-cttz-zero-undef.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-cttz.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-div.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-divrem.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-ext.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-extract-vector-elt.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-extracts.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-fptoi.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-freeze.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-inserts.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-isnan.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-itofp.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-load-store.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-memcpy-et-al.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-merge-values.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-min-max.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-mul.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-non-pow2-load-store.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-phi.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-ptr-add.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-reduce-or.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-rem.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-sadde.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-saddo.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-saddsat.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-select.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-shift.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-simple.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-ssube.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-ssubo.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-ssubsat.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-uadd-sat.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-uadde.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-uaddo.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-usub-sat.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-usube.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-usubo.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-vector-cmp.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalizer-combiner-zext-trunc-crash.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalizer-combiner.mir
M llvm/test/CodeGen/AArch64/GlobalISel/retry-artifact-combine.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/artifact-combiner-anyext.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/artifact-combiner-concat-vectors.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/artifact-combiner-extract.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/artifact-combiner-sext.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/artifact-combiner-unmerge-values.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/artifact-combiner-zext.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-ext-legalizer.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/dummy-target.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fshl.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fshr.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/image_ls_mipmap_zero.a16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-add.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-and.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-anyext.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-ashr.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-bitcast.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-bitreverse.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-bswap.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-build-vector.s16.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-concat-vectors.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-constant.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-ctlz-zero-undef.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-ctlz.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-ctpop.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-cttz-zero-undef.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-cttz.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-extract-vector-elt.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-extract.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fabs.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fadd.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fcanonicalize.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fcmp.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fcopysign.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fma.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fmaxnum.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fminnum.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fmul.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fneg.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fptosi.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fptoui.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fptrunc.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-freeze.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fshl.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fshr.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fsub.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-icmp.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-implicit-def-s1025.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-implicit-def.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-insert-vector-elt.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-insert.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-intrinsic-round.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-inttoptr.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-llvm.amdgcn.image.atomic.dim.a16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-llvm.amdgcn.image.dim.a16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-llvm.amdgcn.image.load.2d.d16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-llvm.amdgcn.image.sample.a16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-llvm.amdgcn.image.sample.g16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-llvm.amdgcn.image.store.2d.d16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-llvm.amdgcn.s.buffer.load.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-constant-32bit.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-constant.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-flat.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-global.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-local.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-memory-metadata.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-private.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-lshr.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-merge-values.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-mul.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-or.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-phi.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-ptr-add.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-ptrmask.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-sadde.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-saddo.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-saddsat.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-sdiv.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-select.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-sext-inreg.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-sext.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-sextload-flat.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-sextload-global.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-sextload-local.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-sextload-private.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-shl.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-shuffle-vector.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-shuffle-vector.s16.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-sitofp.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-smax.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-smin.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-smulh.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-smulo.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-srem.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-sshlsat.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-ssube.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-ssubo.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-ssubsat.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-store-global.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-store.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-sub.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-uadde.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-uaddo.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-uaddsat.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-ubfx.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-udiv.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-uitofp.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-umax.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-umin.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-umulh.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-umulo.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-unmerge-values.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-urem.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-ushlsat.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-usube.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-usubo.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-usubsat.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-xor.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-zext.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-zextload-flat.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-zextload-global.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-zextload-local.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-zextload-private.mir
M llvm/test/CodeGen/ARM/GlobalISel/arm-legalize-bitcounts.mir
M llvm/test/CodeGen/ARM/GlobalISel/arm-legalize-casts.mir
M llvm/test/CodeGen/ARM/GlobalISel/arm-legalize-control-flow.mir
M llvm/test/CodeGen/ARM/GlobalISel/arm-legalize-divmod.mir
M llvm/test/CodeGen/ARM/GlobalISel/arm-legalize-exts.mir
M llvm/test/CodeGen/ARM/GlobalISel/arm-legalize-fp.mir
M llvm/test/CodeGen/ARM/GlobalISel/arm-legalize-load-store.mir
M llvm/test/CodeGen/Mips/GlobalISel/legalizer/add.mir
M llvm/test/CodeGen/Mips/GlobalISel/legalizer/bitwise.mir
M llvm/test/CodeGen/Mips/GlobalISel/legalizer/branch.mir
M llvm/test/CodeGen/Mips/GlobalISel/legalizer/constants.mir
M llvm/test/CodeGen/Mips/GlobalISel/legalizer/ctlz.mir
M llvm/test/CodeGen/Mips/GlobalISel/legalizer/cttz.mir
M llvm/test/CodeGen/Mips/GlobalISel/legalizer/dyn_stackalloc.mir
M llvm/test/CodeGen/Mips/GlobalISel/legalizer/fcmp.mir
M llvm/test/CodeGen/Mips/GlobalISel/legalizer/fptosi_and_fptoui.mir
M llvm/test/CodeGen/Mips/GlobalISel/legalizer/icmp.mir
M llvm/test/CodeGen/Mips/GlobalISel/legalizer/jump_table_and_brjt.mir
M llvm/test/CodeGen/Mips/GlobalISel/legalizer/mul.mir
M llvm/test/CodeGen/Mips/GlobalISel/legalizer/phi.mir
M llvm/test/CodeGen/Mips/GlobalISel/legalizer/rem_and_div.mir
M llvm/test/CodeGen/Mips/GlobalISel/legalizer/select.mir
M llvm/test/CodeGen/Mips/GlobalISel/legalizer/sitofp_and_uitofp.mir
M llvm/test/CodeGen/Mips/GlobalISel/legalizer/store_split_because_of_memsize_or_align.mir
M llvm/test/CodeGen/Mips/GlobalISel/legalizer/sub.mir
M llvm/test/CodeGen/Mips/GlobalISel/legalizer/truncStore_and_aExtLoad.mir
M llvm/test/CodeGen/Mips/GlobalISel/legalizer/zextLoad_and_sextLoad.mir
M llvm/test/CodeGen/Mips/GlobalISel/llvm-ir/bitwise.ll
M llvm/test/CodeGen/Mips/GlobalISel/llvm-ir/constants.ll
M llvm/test/CodeGen/Mips/GlobalISel/llvm-ir/select.ll
M llvm/test/CodeGen/X86/GlobalISel/ashr-scalar.ll
M llvm/test/CodeGen/X86/GlobalISel/legalize-memop-scalar-32.mir
M llvm/test/CodeGen/X86/GlobalISel/legalize-memop-scalar-64.mir
M llvm/test/CodeGen/X86/GlobalISel/legalize-mul-scalar.mir
M llvm/test/CodeGen/X86/GlobalISel/legalize-or-scalar.mir
M llvm/test/CodeGen/X86/GlobalISel/legalize-phi.mir
M llvm/test/CodeGen/X86/GlobalISel/legalize-sub.mir
M llvm/test/CodeGen/X86/GlobalISel/lshr-scalar.ll
M llvm/test/CodeGen/X86/GlobalISel/shl-scalar.ll
M llvm/test/CodeGen/X86/GlobalISel/x86_64-legalize-fcmp.mir
M llvm/test/CodeGen/X86/GlobalISel/x86_64-legalize-sitofp.mir
M llvm/test/CodeGen/X86/GlobalISel/x86_64-legalize-zext.mir
M llvm/unittests/CodeGen/GlobalISel/LegalizerTest.cpp
Log Message:
-----------
[GlobalISel] Avoid creating COPY in LegalizationArtifactCombiner
When Src and Dst used in buildAnyExtOrTrunc or buildSExtOrTrunc
have the same type (creates COPY) use Src register directly or
use replaceRegOrBuildCopy instead.
Differential Revision: https://reviews.llvm.org/D108306
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