[all-commits] [llvm/llvm-project] 99c790: [AMDGPU] Make BVH isel consistent with other MIMG ...

[Carl Ritson via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 99c790dc21b80cceae6084f6cec8c66e75c8d390
      https://github.com/llvm/llvm-project/commit/99c790dc21b80cceae6084f6cec8c66e75c8d390
  Author: Carl Ritson <carl.ritson at amd.com>
  Date:   2021-08-17 (Tue, 17 Aug 2021)

  Changed paths:
    M llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
    M llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp
    M llvm/lib/Target/AMDGPU/MIMGInstructions.td
    M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
    M llvm/lib/Target/AMDGPU/SILoadStoreOptimizer.cpp
    M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h
    M llvm/test/MC/Disassembler/AMDGPU/gfx90a_ldst_acc.txt
    M llvm/test/MC/Disassembler/AMDGPU/mimg_gfx90a.txt

  Log Message:
  -----------
  [AMDGPU] Make BVH isel consistent with other MIMG opcodes

Suffix opcodes with _gfx10.
Remove direct references to architecture specific opcodes.
Add a BVH flag and apply this to diassembly.
Fix a number of disassembly errors on gfx90a target caused by
previous incorrect BVH detection code.

Reviewed By: rampitec

Differential Revision: https://reviews.llvm.org/D108117