[all-commits] [llvm/llvm-project] 2b4235: [InstCombine] Extend sadd.sat tests to include min...

[David Green via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 2b423509941c92766f3682055bef3ba8bfaf1416
      https://github.com/llvm/llvm-project/commit/2b423509941c92766f3682055bef3ba8bfaf1416
  Author: David Green <david.green at arm.com>
  Date:   2021-08-14 (Sat, 14 Aug 2021)

  Changed paths:
    M llvm/test/Transforms/InstCombine/sadd_sat.ll
    A llvm/test/Transforms/PhaseOrdering/ARM/arm_add_q7.ll

  Log Message:
  -----------
  [InstCombine] Extend sadd.sat tests to include min/max patterns. NFC

This tests code starting from smin/smax, as opposed to the icmp/select
form. Also adds a ARM MVE phase ordering test for vectorizing to
sadd.sat from the original IR.