[all-commits] [llvm/llvm-project] 9c47d6: [llvm][sve] Lowering for VLS extending loads

[David Truby via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 9c47d6b48d6b0f0dafb87241f1561fc1b48f9ecd
      https://github.com/llvm/llvm-project/commit/9c47d6b48d6b0f0dafb87241f1561fc1b48f9ecd
  Author: David Truby <david.truby at arm.com>
  Date:   2021-08-12 (Thu, 12 Aug 2021)

  Changed paths:
    M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
    A llvm/test/CodeGen/AArch64/sve-fixed-length-ext-loads.ll
    M llvm/test/CodeGen/AArch64/sve-fixed-length-int-mulh.ll

  Log Message:
  -----------
  [llvm][sve] Lowering for VLS extending loads

This patch enables extending loads for fixed length SVE code generation.

There is a slight regression here in the mulh tests; since these tests
load the parameter and then extend it these are treated as extending
loads which are merged, preventing the mulh instruction from being
generated. As this affects scalable SVE codegen as well this should be
addressed in a separate patch.

Reviewed By: bsmith

Differential Revision: https://reviews.llvm.org/D107057