[all-commits] [llvm/llvm-project] d8667f: [MCA][NFC] Add tests for PR51318 and PR51322.

Andrea Di Biagio via All-commits all-commits at lists.llvm.org
Wed Aug 11 21:40:28 PDT 2021


  Branch: refs/heads/release/13.x
  Home:   https://github.com/llvm/llvm-project
  Commit: d8667f1fe902cdf710d7164be16121013de56e41
      https://github.com/llvm/llvm-project/commit/d8667f1fe902cdf710d7164be16121013de56e41
  Author: Andrea Di Biagio <andrea.dibiagio at sony.com>
  Date:   2021-08-11 (Wed, 11 Aug 2021)

  Changed paths:
    M llvm/test/tools/llvm-mca/X86/Barcelona/load-store-throughput.s
    M llvm/test/tools/llvm-mca/X86/Barcelona/load-throughput.s
    M llvm/test/tools/llvm-mca/X86/Barcelona/store-throughput.s
    M llvm/test/tools/llvm-mca/X86/BdVer2/load-store-throughput.s
    M llvm/test/tools/llvm-mca/X86/BdVer2/load-throughput.s
    M llvm/test/tools/llvm-mca/X86/BdVer2/register-files-1.s
    M llvm/test/tools/llvm-mca/X86/BdVer2/register-files-2.s
    M llvm/test/tools/llvm-mca/X86/BdVer2/register-files-3.s
    M llvm/test/tools/llvm-mca/X86/BdVer2/register-files-4.s
    M llvm/test/tools/llvm-mca/X86/BdVer2/register-files-5.s
    M llvm/test/tools/llvm-mca/X86/BdVer2/store-throughput.s
    A llvm/test/tools/llvm-mca/X86/BtVer2/adc-sequence-readadvance.s
    M llvm/test/tools/llvm-mca/X86/BtVer2/register-files-1.s
    M llvm/test/tools/llvm-mca/X86/BtVer2/register-files-2.s
    M llvm/test/tools/llvm-mca/X86/BtVer2/register-files-3.s
    M llvm/test/tools/llvm-mca/X86/BtVer2/register-files-4.s
    M llvm/test/tools/llvm-mca/X86/BtVer2/register-files-5.s
    A llvm/test/tools/llvm-mca/X86/BtVer2/rmw-adc-sequence-readadvance.s
    A llvm/test/tools/llvm-mca/X86/BtVer2/rmw-add-sequence-readadvance.s
    M llvm/test/tools/llvm-mca/X86/Haswell/cmpxchg16b.s
    M llvm/test/tools/llvm-mca/X86/option-all-stats-1.s
    M llvm/test/tools/llvm-mca/X86/option-all-stats-2.s
    M llvm/test/tools/llvm-mca/X86/option-all-views-1.s
    M llvm/test/tools/llvm-mca/X86/option-all-views-2.s

  Log Message:
  -----------
  [MCA][NFC] Add tests for PR51318 and PR51322.

Also, regenerate existing X86 tests using update_mca_test.py.

(cherry picked from commit f0658c7a429b9e356da1670b280ab943ad0b0b94)


  Commit: 20eced2cb0130869379cb0a959300ea85bee1f38
      https://github.com/llvm/llvm-project/commit/20eced2cb0130869379cb0a959300ea85bee1f38
  Author: Andrea Di Biagio <andrea.dibiagio at sony.com>
  Date:   2021-08-11 (Wed, 11 Aug 2021)

  Changed paths:
    M llvm/lib/Target/X86/X86InstrArithmetic.td
    M llvm/test/tools/llvm-mca/X86/BtVer2/adc-sequence-readadvance.s
    M llvm/test/tools/llvm-mca/X86/BtVer2/rmw-adc-sequence-readadvance.s
    M llvm/test/tools/llvm-mca/X86/BtVer2/rmw-add-sequence-readadvance.s

  Log Message:
  -----------
  [X86][SchedModel] Add missing ReadAdvance for some arithmetic ops (PR51318 and PR51322).

This fixes a bug where implicit uses of EFLAGS were not marked as ReadAdvance in
the RM/MR variants of ADC/SBB (PR51318)

This also fixes the absence of ReadAdvance for the register operand of
RMW arithmetic instructions (PR51322).

Differential Revision: https://reviews.llvm.org/D107367

(cherry picked from commit 7a1a35a1d1ae2e69769505c9f39910067c53d53b)


Compare: https://github.com/llvm/llvm-project/compare/4d9937065a29...20eced2cb013


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