[all-commits] [llvm/llvm-project] f3f309: [AArch64][GlobalISel] Mark v16s8 <- v8s8, v8s8 G_C...
Jessica Paquette via All-commits
all-commits at lists.llvm.org
Thu Aug 5 09:41:59 PDT 2021
Branch: refs/heads/main
Home: https://github.com/llvm/llvm-project
Commit: f3f3098afe1ca21671922e39328f127e79b7dd3c
https://github.com/llvm/llvm-project/commit/f3f3098afe1ca21671922e39328f127e79b7dd3c
Author: Jessica Paquette <jpaquette at apple.com>
Date: 2021-08-05 (Thu, 05 Aug 2021)
Changed paths:
M llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-concat-vectors.mir
M llvm/test/CodeGen/AArch64/GlobalISel/select-concat-vectors.mir
Log Message:
-----------
[AArch64][GlobalISel] Mark v16s8 <- v8s8, v8s8 G_CONCAT_VECTOR as legal
G_CONCAT_VECTORS shows up from time to time when legalizing other instructions.
We actually import patterns for the v16s8 <- v8s8, v8s8 case so marking it
as legal gives us selection for free.
Differential Revision: https://reviews.llvm.org/D107512
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