[all-commits] [llvm/llvm-project] 7a1a35: [X86][SchedModel] Add missing ReadAdvance for some...

[Andrea Di Biagio via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 7a1a35a1d1ae2e69769505c9f39910067c53d53b
      https://github.com/llvm/llvm-project/commit/7a1a35a1d1ae2e69769505c9f39910067c53d53b
  Author: Andrea Di Biagio <andrea.dibiagio at sony.com>
  Date:   2021-08-04 (Wed, 04 Aug 2021)

  Changed paths:
    M llvm/lib/Target/X86/X86InstrArithmetic.td
    M llvm/test/tools/llvm-mca/X86/BtVer2/adc-sequence-readadvance.s
    M llvm/test/tools/llvm-mca/X86/BtVer2/rmw-adc-sequence-readadvance.s
    M llvm/test/tools/llvm-mca/X86/BtVer2/rmw-add-sequence-readadvance.s

  Log Message:
  -----------
  [X86][SchedModel] Add missing ReadAdvance for some arithmetic ops (PR51318 and PR51322).

This fixes a bug where implicit uses of EFLAGS were not marked as ReadAdvance in
the RM/MR variants of ADC/SBB (PR51318)

This also fixes the absence of ReadAdvance for the register operand of
RMW arithmetic instructions (PR51322).

Differential Revision: https://reviews.llvm.org/D107367