[all-commits] [llvm/llvm-project] d9cc5d: [AArch64][SVE] Combine bitcasts of predicate types...

Bradley Smith via All-commits all-commits at lists.llvm.org
Wed Aug 4 08:57:16 PDT 2021


  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: d9cc5d84e4d3bf45df1ef87e677e3ec1431b59b5
      https://github.com/llvm/llvm-project/commit/d9cc5d84e4d3bf45df1ef87e677e3ec1431b59b5
  Author: Bradley Smith <bradley.smith at arm.com>
  Date:   2021-08-04 (Wed, 04 Aug 2021)

  Changed paths:
    M llvm/lib/Target/AArch64/SVEIntrinsicOpts.cpp
    A llvm/test/CodeGen/AArch64/sve-extract-vector-to-predicate-store.ll
    A llvm/test/CodeGen/AArch64/sve-insert-vector-to-predicate-load.ll

  Log Message:
  -----------
  [AArch64][SVE] Combine bitcasts of predicate types with vector inserts/extracts of loads/stores

An insert subvector that is inserting the result of a vector predicate
sized load into undef at index 0, whose result is casted to a predicate
type, can be combined into a direct predicate load. Likewise the same
applies to extract subvector but in reverse.

The purpose of this optimization is to clean up cases that will be
introduced in a later patch where casts to/from predicate types from i8
types will use insert subvector, rather than going through memory early.

This optimization is done in SVEIntrinsicOpts rather than InstCombine to
re-introduce scalable loads as late as possible, to give other
optimizations the best chance possible to do a good job.

Differential Revision: https://reviews.llvm.org/D106549




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