[all-commits] [llvm/llvm-project] bd07c2: [AArch64] Prefer fmov over orr v.16b when copying ...
David Green via All-commits
all-commits at lists.llvm.org
Tue Aug 3 09:26:13 PDT 2021
Branch: refs/heads/main
Home: https://github.com/llvm/llvm-project
Commit: bd07c2e266f65acb0204198ae1a441bf10499cb2
https://github.com/llvm/llvm-project/commit/bd07c2e266f65acb0204198ae1a441bf10499cb2
Author: David Green <david.green at arm.com>
Date: 2021-08-03 (Tue, 03 Aug 2021)
Changed paths:
M llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
M llvm/test/CodeGen/AArch64/arm64-AdvSIMD-Scalar.ll
M llvm/test/CodeGen/AArch64/arm64-aapcs.ll
M llvm/test/CodeGen/AArch64/arm64-neon-copy.ll
M llvm/test/CodeGen/AArch64/arm64-vcvt_f.ll
M llvm/test/CodeGen/AArch64/arm64-vector-insertion.ll
M llvm/test/CodeGen/AArch64/bf16-vector-bitcast.ll
M llvm/test/CodeGen/AArch64/bf16-vector-shuffle.ll
M llvm/test/CodeGen/AArch64/bitcast-promote-widen.ll
M llvm/test/CodeGen/AArch64/combine-comparisons-by-cse.ll
M llvm/test/CodeGen/AArch64/f16-instructions.ll
M llvm/test/CodeGen/AArch64/fadd-combines.ll
M llvm/test/CodeGen/AArch64/fast-isel-select.ll
M llvm/test/CodeGen/AArch64/fp16-v4-instructions.ll
M llvm/test/CodeGen/AArch64/fp16-vector-bitcast.ll
M llvm/test/CodeGen/AArch64/fptosi-sat-scalar.ll
M llvm/test/CodeGen/AArch64/fptosi-sat-vector.ll
M llvm/test/CodeGen/AArch64/fptoui-sat-scalar.ll
M llvm/test/CodeGen/AArch64/fptoui-sat-vector.ll
M llvm/test/CodeGen/AArch64/machine-combiner.ll
M llvm/test/CodeGen/AArch64/mla_mls_merge.ll
M llvm/test/CodeGen/AArch64/neon-mla-mls.ll
M llvm/test/CodeGen/AArch64/popcount.ll
M llvm/test/CodeGen/AArch64/sqrt-fastmath.ll
M llvm/test/CodeGen/AArch64/swift-return.ll
M llvm/test/CodeGen/AArch64/urem-vector-lkk.ll
M llvm/test/CodeGen/AArch64/vec-libcalls.ll
M llvm/test/Transforms/LoopStrengthReduce/AArch64/small-constant.ll
Log Message:
-----------
[AArch64] Prefer fmov over orr v.16b when copying f32/f64
This changes the lowering of f32 and f64 COPY from a 128bit vector ORR to
a fmov of the appropriate type. At least on some CPU's with 64bit NEON
data paths this is expected to be faster, and shouldn't be slower on any
CPU that treats fmov as a register rename.
Differential Revision: https://reviews.llvm.org/D106365
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