[all-commits] [llvm/llvm-project] fa6b2c: [DAGCombiner] don't try to partially reduce add-wi...

RotateRight via All-commits all-commits at lists.llvm.org
Thu Jul 29 05:53:24 PDT 2021


  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: fa6b2c9915ba27e1e97f8901ea4aa877f331fb9f
      https://github.com/llvm/llvm-project/commit/fa6b2c9915ba27e1e97f8901ea4aa877f331fb9f
  Author: Sanjay Patel <spatel at rotateright.com>
  Date:   2021-07-29 (Thu, 29 Jul 2021)

  Changed paths:
    M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
    M llvm/test/CodeGen/AArch64/addsub.ll
    M llvm/test/CodeGen/X86/combine-add.ll

  Log Message:
  -----------
  [DAGCombiner] don't try to partially reduce add-with-overflow ops

This transform was added with D58874, but there were no tests for overflow ops.
We need to change this one way or another because it can crash as shown in:
https://llvm.org/PR51238

Note that if there are no uses of an overflow op's bool overflow result, we
reduce it to a regular math op, so we continue to fold that case either way.
If we have uses of both the math and the overflow bool, then we are likely
not saving anything by creating an independent sub instruction as seen in
the test diffs here.

This patch makes the behavior in SDAG consistent with what we do in
instcombine AFAICT.

Differential Revision: https://reviews.llvm.org/D106983




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