[all-commits] [llvm/llvm-project] 97d227: [AMDGPU] Regenerate anyext test checks

[Simon Pilgrim via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 97d2277b3774a2344c5519ab6f10d175b8a5653e
      https://github.com/llvm/llvm-project/commit/97d2277b3774a2344c5519ab6f10d175b8a5653e
  Author: Simon Pilgrim <llvm-dev at redking.me.uk>
  Date:   2021-07-25 (Sun, 25 Jul 2021)

  Changed paths:
    M llvm/test/CodeGen/AMDGPU/anyext.ll

  Log Message:
  -----------
  [AMDGPU] Regenerate anyext test checks

To simplify diff in future patch


  Commit: 249ef1fa823613291b9ea2707e3055472cb8020c
      https://github.com/llvm/llvm-project/commit/249ef1fa823613291b9ea2707e3055472cb8020c
  Author: Simon Pilgrim <llvm-dev at redking.me.uk>
  Date:   2021-07-25 (Sun, 25 Jul 2021)

  Changed paths:
    M llvm/test/CodeGen/AMDGPU/half.ll

  Log Message:
  -----------
  [AMDGPU] Regenerate half test checks

To simplify diff in future patch


  Commit: 00e37c1cd4b6d25a1237625871bba020a2e3f8b7
      https://github.com/llvm/llvm-project/commit/00e37c1cd4b6d25a1237625871bba020a2e3f8b7
  Author: Simon Pilgrim <llvm-dev at redking.me.uk>
  Date:   2021-07-25 (Sun, 25 Jul 2021)

  Changed paths:
    M llvm/test/CodeGen/AMDGPU/ctpop16.ll

  Log Message:
  -----------
  [AMDGPU] Regenerate ctpop16 test checks

To simplify diff in future patch


  Commit: 9591abd74e4d1230ac403a988a00f2eb319aca11
      https://github.com/llvm/llvm-project/commit/9591abd74e4d1230ac403a988a00f2eb319aca11
  Author: Simon Pilgrim <llvm-dev at redking.me.uk>
  Date:   2021-07-25 (Sun, 25 Jul 2021)

  Changed paths:
    M llvm/test/CodeGen/AMDGPU/global-load-saddr-to-vaddr.ll

  Log Message:
  -----------
  [AMDGPU] Regenerate global-load-saddr-to-vaddr test checks

To simplify diff in future patch


  Commit: 15b883f45771bc06d7f726292e03cadf0ece2a9d
      https://github.com/llvm/llvm-project/commit/15b883f45771bc06d7f726292e03cadf0ece2a9d
  Author: Simon Pilgrim <llvm-dev at redking.me.uk>
  Date:   2021-07-25 (Sun, 25 Jul 2021)

  Changed paths:
    M llvm/lib/Target/X86/X86ISelLowering.cpp
    M llvm/test/CodeGen/X86/insertelement-ones.ll
    M llvm/test/CodeGen/X86/min-legal-vector-width.ll
    M llvm/test/CodeGen/X86/vector-shuffle-128-v16.ll
    M llvm/test/CodeGen/X86/vector-shuffle-128-v8.ll
    M llvm/test/CodeGen/X86/vector-shuffle-256-v16.ll
    M llvm/test/CodeGen/X86/vector-shuffle-512-v64.ll
    M llvm/test/CodeGen/X86/vector-shuffle-v48.ll
    M llvm/test/CodeGen/X86/x86-interleaved-access.ll

  Log Message:
  -----------
  [X86][AVX] Adjust AllowBWIVPERMV3 tolerance to account for VariableCrossLaneShuffleDepth

As noticed on D105390 - we were hardwiring the depth limit for combining to VPERMI2W/VPERMI2B instructions. Not only had we made the limit too low, we hadn't accounted for slow/fast shuffles via the VariableCrossLaneShuffleDepth control


Compare: https://github.com/llvm/llvm-project/compare/4bdfea2c5152...15b883f45771