[all-commits] [llvm/llvm-project] 1ffc36: [RISCV] Add a test showing an incorrect vsetvli in...

Fraser Cormack via All-commits all-commits at lists.llvm.org
Fri Jul 23 09:27:49 PDT 2021


  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 1ffc3693949ce4ea6e2159ecb7d0d7386258e21f
      https://github.com/llvm/llvm-project/commit/1ffc3693949ce4ea6e2159ecb7d0d7386258e21f
  Author: Fraser Cormack <fraser at codeplay.com>
  Date:   2021-07-23 (Fri, 23 Jul 2021)

  Changed paths:
    A llvm/test/CodeGen/RISCV/rvv/vsetvli-regression.ll

  Log Message:
  -----------
  [RISCV] Add a test showing an incorrect vsetvli insertion

This patch adds a reduced test case which identifies an illegal vsetvli
inserted by the compiler. The compiler emits a vsetvli which is intended
to preserve VL with the SEW/LMUL ratio e32/m1 when in fact the VL could
have been set by e64/m2 in a predecessor block.

Differential Revision: https://reviews.llvm.org/D106286




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